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Paper Abstract and Keywords
Presentation 2025-09-04 10:00
A Study on the Design of a High-Speed 5G UPF Node Combining a P4 Switch and a CPU Server
Naoki Wakami, Yutaro Yoshinaka, Junji Takemasa, Yuki Koizumi (UOsaka), Toru Hasegawa (Shimane Univ.) NS2025-72
Abstract (in Japanese) (See Japanese page) 
(in English) A high-speed, large-capacity User Plane Function (UPF) is vital to handling increasing User Equipment (UE) traffic and accommodating massive numbers of UEs. While existing studies address UPF implementations, they did not achieve both goals. CPU server–based UPFs can manage many UEs but are limited to around 100 Gbps. In contrast, P4 switches support Tbps-class throughput but can accommodate only about 150K UEs due to memory capacity limits. A hybrid UPF architecture has been proposed, where a P4 switch processes traffic by accessing UE's packet detection rules stored on a CPU server. However, frequent rule access from/to the CPU server wastes switch bandwidth, limiting throughput to about 400 Gbps despite a 1.6 Tbps switch bandwidth. In this paper, we propose an in-switch cache for active flows to eliminate this bandwidth overhead. We analyze traffic offloading through flow caching using real-world internet traces and evaluate performance based on models constrained by bandwidth and processor speed. These analyses show 51% traffic reduction, resulting in 1.1 Tbps throughput.
Keyword (in Japanese) (See Japanese page) 
(in English) 5G / User Plane Function / Programmable Switch / CPU Server / P4 / / /  
Reference Info. IEICE Tech. Rep., vol. 125, no. 172, NS2025-72, pp. 1-6, Sept. 2025.
Paper # NS2025-72 
Date of Issue 2025-08-28 (NS) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF NS2025-72

Conference Information
Committee NS IN CS NV  
Conference Date 2025-09-04 - 2025-09-05 
Place (in Japanese) (See Japanese page) 
Place (in English) Tohoku University + Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Session management (SIP/IMS), Interoperability/Standardization, NGN/NwGN/Future networks, Cloud/Data center networks, SDN (OpenFlow, etc.)/NFV, IPv6, Machine learning, etc. 
Paper Information
Registration To NS 
Conference Code 2025-09-NS-IN-CS-NV 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Study on the Design of a High-Speed 5G UPF Node Combining a P4 Switch and a CPU Server 
Sub Title (in English)  
Keyword(1) 5G  
Keyword(2) User Plane Function  
Keyword(3) Programmable Switch  
Keyword(4) CPU Server  
Keyword(5) P4  
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Keyword(8)  
1st Author's Name Naoki Wakami  
1st Author's Affiliation The University of Osaka (UOsaka)
2nd Author's Name Yutaro Yoshinaka  
2nd Author's Affiliation The University of Osaka (UOsaka)
3rd Author's Name Junji Takemasa  
3rd Author's Affiliation The University of Osaka (UOsaka)
4th Author's Name Yuki Koizumi  
4th Author's Affiliation The University of Osaka (UOsaka)
5th Author's Name Toru Hasegawa  
5th Author's Affiliation Shimane University (Shimane Univ.)
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Speaker Author-3 
Date Time 2025-09-04 10:00:00 
Presentation Time 25 minutes 
Registration for NS 
Paper # NS2025-72 
Volume (vol) vol.125 
Number (no) no.172 
Page pp.1-6 
#Pages 6 
Date of Issue 2025-08-28 (NS) 

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