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Paper Abstract and Keywords
Presentation 2025-12-02 10:25
Generation of a Standard-Cell Library Supporting Forward Body Biasing at Cryogenic Temperatures and Performance Evaluation on a RISC Processor
Shin Taniguchi, Zhipeng Liang, Hajime Tanakayama (KIT), Jun Shiomi (UOsaka), Michihiro Shintani (KIT) VLD2025-26 ICD2025-46 DC2025-59 RECONF2025-77
Abstract (in Japanese) (See Japanese page) 
(in English) Control electronics for quantum computers, including superconducting and ion-trap, must operate with extremely low power due to the limited cooling capacity of dilution refrigerators. Conventional low-power techniques such as voltage scaling and forward body biasing (FBB) require consideration of cryogenic-induced shifts in threshold voltage and diode characteristics. This study experimentally evaluates these techniques at 7K using a RISC processor. Transistor characteristics were measured and fitted with the BSIM4 model to generate 100 standard-cell libraries with different supply and body voltages. Evaluation results show that voltage scaling alone degraded the Energy-Delay Product (EDP) by about 4.5 times compared to room temperature, whereas combining FBB improved EDP by roughly 70%. These findings demonstrate that body bias control effectively mitigates performance loss in cryogenic low-power LSI design.
Keyword (in Japanese) (See Japanese page) 
(in English) Comapct Modeling / Quantum Computer / Forward Body Biasing / RISC Processor / Cryo-CMOS / / /  
Reference Info. IEICE Tech. Rep., vol. 125, no. 260, VLD2025-26, pp. 52-57, Dec. 2025.
Paper # VLD2025-26 
Date of Issue 2025-11-24 (VLD, ICD, DC, RECONF) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2025-26 ICD2025-46 DC2025-59 RECONF2025-77

Conference Information
Committee VLD DC RECONF ICD IPSJ-SLDM  
Conference Date 2025-12-01 - 2025-12-03 
Place (in Japanese) (See Japanese page) 
Place (in English) Toyama International Conference Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2025 -New Field of VLSI Design- 
Paper Information
Registration To VLD 
Conference Code 2025-12-VLD-DC-RECONF-ICD-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Generation of a Standard-Cell Library Supporting Forward Body Biasing at Cryogenic Temperatures and Performance Evaluation on a RISC Processor 
Sub Title (in English)  
Keyword(1) Comapct Modeling  
Keyword(2) Quantum Computer  
Keyword(3) Forward Body Biasing  
Keyword(4) RISC Processor  
Keyword(5) Cryo-CMOS  
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Keyword(7)  
Keyword(8)  
1st Author's Name Shin Taniguchi  
1st Author's Affiliation Kyoto Institute of Technology (KIT)
2nd Author's Name Zhipeng Liang  
2nd Author's Affiliation Kyoto Institute of Technology (KIT)
3rd Author's Name Hajime Tanakayama  
3rd Author's Affiliation Kyoto Institute of Technology (KIT)
4th Author's Name Jun Shiomi  
4th Author's Affiliation Osaka University (UOsaka)
5th Author's Name Michihiro Shintani  
5th Author's Affiliation Kyoto Institute of Technology (KIT)
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Speaker Author-1 
Date Time 2025-12-02 10:25:00 
Presentation Time 20 minutes 
Registration for VLD 
Paper # VLD2025-26, ICD2025-46, DC2025-59, RECONF2025-77 
Volume (vol) vol.125 
Number (no) no.260(VLD), no.261(ICD), no.262(DC), no.263(RECONF) 
Page pp.52-57 
#Pages 6 
Date of Issue 2025-11-24 (VLD, ICD, DC, RECONF) 

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