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Paper Abstract and Keywords
Presentation 2026-01-22 14:00
Simultaneous Topology and Sizing Optimization Based on the Circuit Simulator Scideam
Naoki Fukuda, Yinchen Xie (Chiba univ.), Soichiro Nakamura, Masatoshi Nakahara, Yuki Ogawa (Smart Energy Lab), Kien Nguyen, Hiroo Sekiya (Chiba univ.) EE2025-31
Abstract (in Japanese) (See Japanese page) 
(in English) This study proposes a novel hybrid optimization method using the circuit simulator Scideam, designed to address mixed optimization problems that simultaneously involve circuit topology and circuit parameter selection.
The proposed method uses a hierarchical structure. NSGA-II serves as the outer loop for topology exploration. A genetic algorithm is then applied as the inner loop to optimize parameters for each new topology.
By performing graph-theory-based circuit representation and evaluating multiple circuit performance metrics directly within Scideam, the proposed framework enables unified optimization of topology and parameters within a practical computation time.
As a design example, the method was applied to an E-class inverter, where the optimization results included conventional E-class inverter solutions and also yielded novel circuit topologies with higher efficiency, thereby demonstrating the effectiveness of the proposed method.
Keyword (in Japanese) (See Japanese page) 
(in English) Circuit simulation / Circuit topology design / Power Conversion Circuits / Hybrid optimization / / / /  
Reference Info. IEICE Tech. Rep., vol. 125, no. 323, EE2025-31, pp. 7-12, Jan. 2026.
Paper # EE2025-31 
Date of Issue 2026-01-15 (EE) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EE2025-31

Conference Information
Committee EE  
Conference Date 2026-01-22 - 2026-01-23 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EE 
Conference Code 2026-01-EE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Simultaneous Topology and Sizing Optimization Based on the Circuit Simulator Scideam 
Sub Title (in English)  
Keyword(1) Circuit simulation  
Keyword(2) Circuit topology design  
Keyword(3) Power Conversion Circuits  
Keyword(4) Hybrid optimization  
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1st Author's Name Naoki Fukuda  
1st Author's Affiliation Chiba University (Chiba univ.)
2nd Author's Name Yinchen Xie  
2nd Author's Affiliation Chiba University (Chiba univ.)
3rd Author's Name Soichiro Nakamura  
3rd Author's Affiliation Smart Energy Laboratory Co.,Ltd. (Smart Energy Lab)
4th Author's Name Masatoshi Nakahara  
4th Author's Affiliation Smart Energy Laboratory Co.,Ltd. (Smart Energy Lab)
5th Author's Name Yuki Ogawa  
5th Author's Affiliation Smart Energy Laboratory Co.,Ltd. (Smart Energy Lab)
6th Author's Name Kien Nguyen  
6th Author's Affiliation Chiba University (Chiba univ.)
7th Author's Name Hiroo Sekiya  
7th Author's Affiliation Chiba University (Chiba univ.)
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Speaker Author-1 
Date Time 2026-01-22 14:00:00 
Presentation Time 30 minutes 
Registration for EE 
Paper # EE2025-31 
Volume (vol) vol.125 
Number (no) no.323 
Page pp.7-12 
#Pages 6 
Date of Issue 2026-01-15 (EE) 

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