| Paper Abstract and Keywords |
| Presentation |
2026-03-05 14:15
[Memorial Lecture]
BitROM: Weight Reload-Free CiROM Architecture Towards Billion-Parameter 1.58-bit LLM Inference Wenlun Zhang (Keio Univ.), Xinyu Li (Nanjing Univ.), Shimpei Ando, Kentaro Yoshioka (Keio Univ.) VLD2025-93 HWS2025-89 ICD2025-104 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
Compute-in-Read-Only-Memory (CiROM) accelerators provide excellent energy efficiency by eliminating runtime weight updates, but their extension to Large Language Models (LLMs) is limited by massive parameter sizes. This lecture introduces BitROM, a CiROM architecture co-designed with 1.58-bit BitNet, enabling efficient LLM inference at the edge. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Compute-in-Memory / Read-Only-Memory / Large Language Model / BitNet / KV-Cache / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 125, no. 382, VLD2025-93, pp. 98-98, March 2026. |
| Paper # |
VLD2025-93 |
| Date of Issue |
2026-02-25 (VLD, HWS, ICD) |
| ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
VLD2025-93 HWS2025-89 ICD2025-104 |
| Conference Information |
| Committee |
ICD HWS VLD |
| Conference Date |
2026-03-04 - 2026-03-07 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
|
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
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| Paper Information |
| Registration To |
VLD |
| Conference Code |
2026-03-ICD-HWS-VLD |
| Language |
English |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
BitROM: Weight Reload-Free CiROM Architecture Towards Billion-Parameter 1.58-bit LLM Inference |
| Sub Title (in English) |
|
| Keyword(1) |
Compute-in-Memory |
| Keyword(2) |
Read-Only-Memory |
| Keyword(3) |
Large Language Model |
| Keyword(4) |
BitNet |
| Keyword(5) |
KV-Cache |
| Keyword(6) |
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| Keyword(7) |
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| 1st Author's Name |
Wenlun Zhang |
| 1st Author's Affiliation |
Keio University (Keio Univ.) |
| 2nd Author's Name |
Xinyu Li |
| 2nd Author's Affiliation |
Nanjing University (Nanjing Univ.) |
| 3rd Author's Name |
Shimpei Ando |
| 3rd Author's Affiliation |
Keio University (Keio Univ.) |
| 4th Author's Name |
Kentaro Yoshioka |
| 4th Author's Affiliation |
Keio University (Keio Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2026-03-05 14:15:00 |
| Presentation Time |
25 minutes |
| Registration for |
VLD |
| Paper # |
VLD2025-93, HWS2025-89, ICD2025-104 |
| Volume (vol) |
vol.125 |
| Number (no) |
no.382(VLD), no.383(HWS), no.384(ICD) |
| Page |
p.98 |
| #Pages |
1 |
| Date of Issue |
2026-02-25 (VLD, HWS, ICD) |