| 講演抄録/キーワード |
| 講演名 |
2026-03-05 14:40
[記念講演]LMESN: A Leakage-Driven MOSFET Reservoir for Scalable and Ultra-Low-Power Temporal Inference ○Haoyuan Li(XJTU/Kyoto Univ.)・Masami Utsunomiya・Ryuto Seki・Quan Cheng・Weirong Dong(Kyoto Univ.)・Feng Liang(XJTU)・Takashi Sato(Kyoto Univ.) VLD2025-94 HWS2025-90 ICD2025-105 |
| 抄録 |
(和) |
Edge-based temporal inference demands energy-efficient and scalable computing architectures, but existing analog reservoir computing models often face high energy costs and limited reconfigurability. We present LMESN, a leakage-current-driven, pulse-based reservoir computing architecture that exploits intrinsic threshold-voltage variation in standard CMOS to realize ultra-low-power stochastic dynamics. To overcome physical array size constraints, we propose a Shift-Multi-Mask (SMM) technique that emulates large virtual reservoirs through cyclic mask shifts, reducing update energy by over 100× and enabling single-cycle reconfiguration. To further boost task-level performance, we develop a hardware–software co-optimization framework that jointly tunes the ADC quantization range and reservoir mask structure via a discrete genetic algorithm. Post-layout simulations in 22 nm CMOS and evaluations on eight time-series datasets demonstrate up to 13.7% accuracy improvement and 5× variance reduction over unoptimized LMESN baselines. Compared to prior analog and neural network models, LMESN achieves 3–7 orders of magnitude lower energy consumption while delivering competitive or superior accuracy. Together, these innovations make LMESN a scalable, energy-efficient, and task-adaptive platform for edge temporal processing, setting a new direction in physical reservoir computing. |
| (英) |
Edge-based temporal inference demands energy-efficient and scalable computing architectures, but existing analog reservoir computing models often face high energy costs and limited reconfigurability. We present LMESN, a leakage-current-driven, pulse-based reservoir computing architecture that exploits intrinsic threshold-voltage variation in standard CMOS to realize ultra-low-power stochastic dynamics. To overcome physical array size constraints, we propose a Shift-Multi-Mask (SMM) technique that emulates large virtual reservoirs through cyclic mask shifts, reducing update energy by over 100× and enabling single-cycle reconfiguration. To further boost task-level performance, we develop a hardware–software co-optimization framework that jointly tunes the ADC quantization range and reservoir mask structure via a discrete genetic algorithm. Post-layout simulations in 22 nm CMOS and evaluations on eight time-series datasets demonstrate up to 13.7% accuracy improvement and 5× variance reduction over unoptimized LMESN baselines. Compared to prior analog and neural network models, LMESN achieves 3–7 orders of magnitude lower energy consumption while delivering competitive or superior accuracy. Together, these innovations make LMESN a scalable, energy-efficient, and task-adaptive platform for edge temporal processing, setting a new direction in physical reservoir computing. |
| キーワード |
(和) |
Reservoir Computing / Echo State Network / Leakage Current / Analog Computing / Optimization Algorithm / / / |
| (英) |
Reservoir Computing / Echo State Network / Leakage Current / Analog Computing / Optimization Algorithm / / / |
| 文献情報 |
信学技報, vol. 125, no. 382, VLD2025-94, pp. 99-105, 2026年3月. |
| 資料番号 |
VLD2025-94 |
| 発行日 |
2026-02-25 (VLD, HWS, ICD) |
| ISSN |
Online edition: ISSN 2432-6380 |
著作権に ついて |
技術研究報告に掲載された論文の著作権は電子情報通信学会に帰属します.(許諾番号:10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| PDFダウンロード |
VLD2025-94 HWS2025-90 ICD2025-105 |
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