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Paper Abstract and Keywords
Presentation 2026-06-02 10:00
A Study on Automatic Directive Insertion in HLS
Keisuke Takano (JAIST), Yasushi Inoguchi (Kanazawa Univ.) CPSY2026-6 DC2026-6 RECONF2026-6
Abstract (in Japanese) (See Japanese page) 
(in English) High-level synthesis (HLS) enables the generation of hardware from languages such as C, but performance optimization requires the insertion of directives such as pragmas,
which is a challenge that heavily depends on the designer's experience.
This study proposes a method for automatically inserting directives based on loop structure and memory access characteristics by analyzing C code.
Applied to multiple benchmark circuits and evaluated from the perspective of execution time and resource usage,
it was confirmed that performance equivalent to manual design can be achieved for certain C language descriptions.
Keyword (in Japanese) (See Japanese page) 
(in English) High-level synthesis / automatic directive insertion / FPGA / performance optimization / / / /  
Reference Info. IEICE Tech. Rep., vol. 126, no. 51, RECONF2026-6, pp. 29-32, June 2026.
Paper # RECONF2026-6 
Date of Issue 2026-05-25 (CPSY, DC, RECONF) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2026-6 DC2026-6 RECONF2026-6

Conference Information
Committee CPSY DC RECONF IPSJ-ARC  
Conference Date 2026-06-01 - 2026-06-03 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To RECONF 
Conference Code 2026-06-CPSY-DC-RECONF-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Study on Automatic Directive Insertion in HLS 
Sub Title (in English)  
Keyword(1) High-level synthesis  
Keyword(2) automatic directive insertion  
Keyword(3) FPGA  
Keyword(4) performance optimization  
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1st Author's Name Keisuke Takano  
1st Author's Affiliation Japan Advanced Institute of Science and Technology (JAIST)
2nd Author's Name Yasushi Inoguchi  
2nd Author's Affiliation Kanazawa University (Kanazawa Univ.)
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Speaker Author-1 
Date Time 2026-06-02 10:00:00 
Presentation Time 20 minutes 
Registration for RECONF 
Paper # CPSY2026-6, DC2026-6, RECONF2026-6 
Volume (vol) vol.126 
Number (no) no.49(CPSY), no.50(DC), no.51(RECONF) 
Page pp.29-32 
#Pages 4 
Date of Issue 2026-05-25 (CPSY, DC, RECONF) 

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