| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| ICD, CPM |
2005-01-27
13:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Analysis method of LSI open failure point
Yasumaro Komiya, Shuji Kikuchi (PERL), Akira Shimase, Kazuya Mukogawa (Renesas) |
For the purpose of locating an open-failure point in recent LSIs of higher integration, we propose an analysis technique... [more] |
CPM2004-155 ICD2004-200
pp.1-6 |
| ICD, CPM |
2005-01-27
13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Evaluation of LVP observability in 90nm devices, and development of on-chip elements for LVP measurement
Junpei Nonaka, Shinichi Wada (NEC Electronics) |
For devices after 90nm generation, LVP measurement will be difficult, because transistor sizes are less than laser diffr... [more] |
CPM2004-156 ICD2004-201
pp.7-12 |
| ICD, CPM |
2005-01-27
14:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
High-resolution failure analysis with SIL plate
Takeshi Yoshida, Thoru Koyama, Junko Komori, Yoji Mashiko (Renesas) |
[more] |
CPM2004-157 ICD2004-202
pp.13-17 |
| ICD, CPM |
2005-01-27
14:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Observation of completed LSI after building-in defect using Laser-SQUID microscopy
Tetsuya Sakai, Kiyoshi Nikawa (NEC Electronics) |
[more] |
CPM2004-158 ICD2004-203
pp.19-24 |
| ICD, CPM |
2005-01-27
15:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Special Invited Talk]
Current challenges and the future of evaluation analysis technology of ULSI
-- The technology as a lifeline of LSI in the future --
Yoji Mashiko (Renesas) |
[more] |
CPM2004-159 ICD2004-204
pp.25-30 |
| ICD, CPM |
2005-01-27
16:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Observation of MOSFETs using laser THz-emission microscope
Masatsugu Yamashita, Kodo Kawase, Chiko Otani (RIKEN), Kiyoshi Nikawa (NEC Electron.), Masayoshi Tonouchi (Osaka Univ.) |
[more] |
CPM2004-160 ICD2004-205
pp.31-34 |
| ICD, CPM |
2005-01-27
16:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
The Study of An-Ag-X Lead Free Solders for High Reliability
Masazumi Amagai (TI Japan), Tsukasa Ohnishi, (SMI) |
[more] |
CPM2004-161 ICD2004-206
pp.35-38 |
| ICD, CPM |
2005-01-28
09:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
10Gbps Serial Links Prototype for Server and Router
Masayoshi Yagyu, Hiroki Yamashita, Fumio Yuki, Tatsuya Kawasimo (CRL, Hitachi), Yasuhiro Hujimura (MDD, Hitachi), Yoshihumi Takada (ESD, Hitachi) |
This paper describes a trial production of 10Gbps class serial transmission prototype for servers and routers. Interfa... [more] |
CPM2004-162 ICD2004-207
pp.1-6 |
| ICD, CPM |
2005-01-28
09:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
High reliability assurance method and its apprication on high density and large pin-count package
Syuhei Hashimoto, Yassumasa Kawaguchi, Minoru Hanyu, Toshihiro Matsunaga, Mitsuhisa Matsuo, Naoko Kawatani, Yasuhisa Higuchi, Takahiko Takahashi (Hitachi,LTD MDD) |
[more] |
CPM2004-163 ICD2004-208
pp.7-11 |
| ICD, CPM |
2005-01-28
10:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Post-Packaging Auto Repair Techniques For Fast Row Cycle Embedded DRAM
Atsushi Nakayama, Toshimasa Namekawa, Hiroshi Ito, Osamu Wada, Shuso Fujii (TOSHIBA Corp.) |
[more] |
CPM2004-164 ICD2004-209
pp.13-18 |
| ICD, CPM |
2005-01-28
10:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Investigation of diagnostic methods for analog circuits
Norio Kuji (Hachinohe C. T.) |
[more] |
CPM2004-165 ICD2004-210
pp.19-24 |
| ICD, CPM |
2005-01-28
11:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Improvement of RTL Fault Diagnosis Technology for Practical Use
Masafumi Nikaido, Yukihisa Funatsu (NEC Electronics Corporation) |
RTL (Register Transfer Level) fault diagnosis technique based on backtracking the node in Assignment Decision Diagrams (... [more] |
CPM2004-166 ICD2004-211
pp.25-30 |
| ICD, CPM |
2005-01-28
11:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
On Observability Quantification for Fault Diagnosis of VLSI Circuits
Naoya Toyota, Seiji Kajihara, Xiaoqing Wen (KIT), Masaru Sanada (NEC Electoronics) |
In most fault diagnosis, logic values can be observed at primary outputs and scan flip-flops as observation points. Howe... [more] |
CPM2004-167 ICD2004-212
pp.31-34 |
| ICD, CPM |
2005-01-28
13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A decompressor with buffer for test compression / decompression
Michihiro, Masakuni Ochi, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) |
Test compression / decompression scheme using variable-length coding, e.g., Huffman coding, is effective in reducing the... [more] |
CPM2004-168 ICD2004-213
pp.35-40 |
| ICD, CPM |
2005-01-28
14:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
On Finding Don't Cares in Test Sequences for Sequential Circuits and Applications to Test Compaction and Power Reduction
Yoshinobu Higami (Ehime Univ.), Seiji Kajihara (Kyushu Inst. Tech.), Shin-ya Kobayashi, Yuzo Takamatsu (Ehime Univ.) |
This paper presents a method for finding don't cares in test sequences hile keeping the original stuck-at fault coverage... [more] |
CPM2004-169 ICD2004-214
pp.41-46 |
| ICD, CPM |
2005-01-28
14:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
LSI fault diagnosis by using functional test result and netlist extracted from CAD layout data
Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka (Osaka Univ.) |
[more] |
CPM2004-170 ICD2004-215
pp.47-51 |
| ICD, CPM |
2005-01-28
15:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Selection of Seeds and Phase Shifters for Scan BIST
Masayuki Arai, Harunobu Kurokawa, Kenichi Ichino, Satoshi Fukumoto, Kazuhiko Iwasaki (Tokyo Metro. Univ.) |
In this paper, we discuss the application of a seed-selection procedure for LFSR-based BIST to multiple scan chains, com... [more] |
CPM2004-171 ICD2004-216
pp.53-58 |
| ICD, CPM |
2005-01-28
15:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Learning-Based Improvement in Fault Tolerance of Hopfield Associative Memories
Naotake Kamiura, Teijiro Isokawa, Nobuyuki Matsui (Univ. of Hyogo) |
Hopfield neural networks tolerating weight faults are presented. The weight restriction and fault injection are adopted... [more] |
CPM2004-172 ICD2004-217
pp.59-64 |
| ICD, CPM |
2005-01-28
16:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
New SoC Testing technologies for beyond 65nm process rule
-- New Failure Analysis and Testing methodologies for low-k/Cu Interconnect technique --
Makoto Yamazaki, Yasuo Furukawa (ADVANTEST) |
To solve the problems such as the yield improvements and securing the test quality in the SoC devices made efficient, th... [more] |
CPM2004-173 ICD2004-218
pp.65-70 |
| ICD, CPM |
2005-01-28
16:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Development of Multiple Fault Diagnosis Based on Path-Tracing for Logic LSIs
Yukihisa Funatsu, Hiroshi Sumitomo, Kazuki Shigeta, Toshio Ishiyama (NECEL) |
For recent highly integrated and shrunk LSIs, CAD-based fault diagnosis technology which supports physical failure analy... [more] |
CPM2004-174 ICD2004-219
pp.71-76 |