| Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM) |
[schedule] [select]
|
|
| Chair |
|
Yutaka Tamiya (Fujitsu Lab.) |
| Secretary |
|
Seiya Shibata (NEC), Yukio Mitsuyama (Kochi Univ. of Tech.), Eiichi Hosoya (NTT) |
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|
|
| Chair |
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Noriyuki Minegishi (Mitsubishi Electric) |
| Vice Chair |
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Nozomu Togawa (Waseda Univ.) |
| Secretary |
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Koyo Nitta (NTT), Yukihide Kohira (Univ. of Aizu) |
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|
|
| Chair |
|
Koji Nakano (Hiroshima Univ.) |
| Vice Chair |
|
Hidetsugu Irie (Univ. of Tokyo), Takashi Miyoshi (Fujitsu) |
| Secretary |
|
Takeshi Ohkawa (Utsunomiya Univ.), Shinya Takameda (Hokkaido Univ.) |
| Assistant |
|
Yasuaki Ito (Hiroshima Univ.), Tomoaki Tsumura (Nagoya Inst. of Tech.) |
|
|
|
| Chair |
|
Masato Motomura (Hokkaido Univ.) |
| Vice Chair |
|
Yuichiro Shibata (Nagasaki Univ.), Kentaro Sano (RIKEN) |
| Secretary |
|
Kazuya Tanigawa (Hiroshima City Univ.), Takefumi Miyoshi (e-trees.Japan) |
| Assistant |
|
Yuuki Kobayashi (NEC), Hiroki Nakahara (Tokyo Inst. of Tech.) |
|
|
|
| Chair |
|
Koji Inoue (Kyushu Univ.) |
| Secretary |
|
Masaaki Kondo (Univ. of Tokyo), Ryota Shioya (Nagoya Univ.), Miho Tanaka (Fujitsu Lab.), Yohei Hasegawa (Toshiba Memory) |
|
| Conference Date |
Wed, Jan 30, 2019 10:30 - 20:00
Thu, Jan 31, 2019 09:30 - 16:20 |
| Topics |
FPGA Applications, etc. |
| Conference Place |
|
| Transportation Guide |
https://www.keio.ac.jp/en/maps/hiyoshi.html |
| Sponsors |
This conference is supported by IEEE CEDA All Japan Joint Chapter.
|
Copyright
and
reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Registration Fee |
This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on RECONF, VLD, CPSY. |
Wed, Jan 30 AM
10:30 - 12:10 |
(1)
VLD |
10:30-10:55 |
On Delay Optimization for Improving General Synchronous Performance  VLD2018-72 CPSY2018-82 RECONF2018-46 |
Eijiro Sassa, Shimpei Sato, Atsushi Takahashi (Tokyo Tech) |
(2)
VLD |
10:55-11:20 |
Proposal of reduction method of calculations by using Leading Zero in the Extended Euclidean Algorithm VLD2018-73 CPSY2018-83 RECONF2018-47 |
Masaki Ogino, Yuki Tanaka, Shugang Wei (Gunma Univ.) |
(3)
VLD |
11:20-11:45 |
An Incremental Automatic Test Pattern Generation Method for Multiple Stuck-at Faults VLD2018-74 CPSY2018-84 RECONF2018-48 |
Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita (UTokyo) |
| (4) |
11:45-12:10 |
(Cancelled) |
| |
12:10-13:30 |
Lunch Break ( 80 min. ) |
Wed, Jan 30 PM
13:30 - 14:45 |
(5)
RECONF |
13:30-13:55 |
A CNN with a Noise Addition for Efficient Implementation on an FPGA VLD2018-75 CPSY2018-85 RECONF2018-49 |
Atsuki Munakata, Shimpei Satou, Hiroki Nakahara (Tokyo Tech) |
(6)
RECONF |
13:55-14:20 |
Filter-wise Pruning Approach to FPGA Implementation of Fully Convolutional Network for Semantic Segmentation VLD2018-76 CPSY2018-86 RECONF2018-50 |
Masayuki Shimoda, Youki Sada, Hiroki Nakahara (titech) |
(7)
RECONF |
14:20-14:45 |
Study of stacked full adder circuit with fabrication technology of 3D flash memory VLD2018-77 CPSY2018-87 RECONF2018-51 |
Fumiya Suzuki, Sigeyoshi Watanabe (Shonan Inst. of Tech.) |
| |
14:45-15:05 |
Break ( 20 min. ) |
Wed, Jan 30 PM
15:05 - 16:20 |
(8)
RECONF |
15:05-15:30 |
Design and implementation of FPGA measurement feedback system in Coherent Ising Machine VLD2018-78 CPSY2018-88 RECONF2018-52 |
Toshimori Honjo, Takahiro Inagaki, Kensuke Inaba, Takuya Ikuta, Hiroki Takesue (NTT) |
(9)
RECONF |
15:30-15:55 |
An integrated development platform of FPGA for ROS-based autonomous mobile robot VLD2018-79 CPSY2018-89 RECONF2018-53 |
Sou Tamura, Yasuhiro Nitta, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ) |
(10)
RECONF |
15:55-16:20 |
Implementation of Image Processing Algorithm Aiming for Autonomous Car Using FPGA VLD2018-80 CPSY2018-90 RECONF2018-54 |
Koki Honda, Wei Kaije, Hideharu Amano (Keio Univ.) |
| |
16:20-16:40 |
Break ( 20 min. ) |
Wed, Jan 30 PM
16:40 - 17:40 |
(11)
CPSY |
16:40-17:40 |
[Invited Talk]
Large Scale PC Cluster Technologies
-- 20 years and future perspectives perspectives -- VLD2018-81 CPSY2018-91 RECONF2018-55 |
Kohta Nakashima (Fujitsu lab.) |
| |
17:40-18:00 |
Break ( 20 min. ) |
Wed, Jan 30 PM
18:00 - 20:00 |
| |
- |
|
Thu, Jan 31 AM
09:30 - 10:45 |
(12)
CPSY |
09:30-09:55 |
The Evaluation of Partial Reconfiguration for FiCSW VLD2018-82 CPSY2018-92 RECONF2018-56 |
Miho Yamakura, Keita Azegami, Kazusa Musha, Hideharu Amano (Keio Univ.) |
(13)
CPSY |
09:55-10:20 |
A Deduplication Mechanism for Effectively-once Semantics Using FPGA NIC VLD2018-83 CPSY2018-93 RECONF2018-57 |
Koji Suzuki, Koya Mitsuzuka, Takuma Iwata, Hiroki Matsutani (Keio Univ.) |
(14)
CPSY |
10:20-10:45 |
Preliminary Evaluation of Parallel Processing Performance on MPI Runtime Environment for Android OS VLD2018-84 CPSY2018-94 RECONF2018-58 |
Masahiro Nissato, Hiroki Sugiyama, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) |
| |
10:45-11:00 |
Break ( 15 min. ) |
Thu, Jan 31 AM
11:00 - 12:15 |
(15)
CPSY |
11:00-11:25 |
A Case for Unsupervised Abnormal Behavior Detection Using Multiple Online Sequential Learning Cores VLD2018-85 CPSY2018-95 RECONF2018-59 |
Rei Ito, Mineto Tsukada (Keio Univ), Masaaki Kondo (Univ Tokyo), Hiroki Matsutani (Keio Univ) |
(16)
CPSY |
11:25-11:50 |
Area and Performance Evaluations of Online Sequential Learning and Unsupervised Anomaly Detection Core VLD2018-86 CPSY2018-96 RECONF2018-60 |
Tomoya Itsubo, Mineto Tsukada, Hiroki Matsutani (Keio Univ.) |
| (17) |
11:50-12:15 |
|
| |
12:15-13:35 |
Lunch Break ( 80 min. ) |
Thu, Jan 31 PM
13:35 - 14:50 |
(18)
RECONF |
13:35-14:00 |
VLD2018-87 CPSY2018-97 RECONF2018-61 |
|
(19)
RECONF |
14:00-14:25 |
Preliminary evaluation of special instruction implementation methods by high level synthesis VLD2018-88 CPSY2018-98 RECONF2018-62 |
Ryodai Iwamoto, Naoki Fujieda, Shuichi Ichikawa, Joji Sakamoto (TUT) |
(20)
RECONF |
14:25-14:50 |
VLD2018-89 CPSY2018-99 RECONF2018-63 |
|
| |
14:50-15:05 |
Break ( 15 min. ) |
Thu, Jan 31 PM
15:05 - 16:20 |
(21)
RECONF |
15:05-15:30 |
VLD2018-90 CPSY2018-100 RECONF2018-64 |
|
(22)
RECONF |
15:30-15:55 |
VLD2018-91 CPSY2018-101 RECONF2018-65 |
Takefumi Miyoshi (TOYOTA ITC) |
(23)
RECONF |
15:55-16:20 |
An implementation and evaluation of Lattice-Boltzmann Method on Intel Programmable Accelerator Card VLD2018-92 CPSY2018-102 RECONF2018-66 |
Takaaki Miyajima, Tomohiro Ueno, Kentaro Sano (RIKEN) |
| Announcement for Speakers |
| General Talk | Each speech will have 20 minutes for presentation and 5 minutes for discussion. |
Last modified: 2019-01-30 10:56:56
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