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|
| Chair |
|
Tanemasa Asano (Kyushu Univ.) |
| Vice Chair |
|
Toshihiro Sugii (Fujitsu) |
| Secretary |
|
Shigeru Kawanaka (Toshiba), Hisahiro Anzai (Sony) |
| Assistant |
|
Syunichiro Ohmi (Tokyo Inst. of Tech.) |
|
| Conference Date |
Fri, Mar 14, 2008 13:00 - 16:45 |
| Topics |
|
| Conference Place |
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Copyright
and
reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Fri, Mar 14 PM
13:00 - 16:45 |
| |
13:00-13:05 |
opening address ( 5 min. ) |
| (1) |
13:05-13:30 |
15nm Planar Bulk SONOS-type Memory with Double Junstion Tunnel Layers  SDM2007-273 |
Ryuji Ohba, Yuichiro Mitani, Naoharu Sugiyama, Shinobu Fujita (Toshiba) |
| (2) |
13:30-13:55 |
Phase change memory with good data retention |
Takahiro Morikawa (CRL, Hitachi) |
| (3) |
13:55-14:20 |
Fabrication and characterization of oxide-channel ferroelectric-gate nonvolatile memory devices SDM2007-274 |
Hiroshi Shibata, Tomohiro Oiwa, Eisuke Tokumitsu (Tokyo Tech) |
| (4) |
14:20-14:45 |
Characteristics of metal-ferroelectric-insulartor-semiconductor structures based on poly(vinylidene fluoride-trifluoroethylene) SDM2007-275 |
Joo Won Yoon, Shun-ichiro Ohmi, Hiroshi Ishiwara (Tokyo Inst. of Tech) |
| |
14:45-15:00 |
Break ( 15 min. ) |
| (5) |
15:00-15:25 |
Compliant Micro-Bumps for 3D Stacked-Chip LSIs with High Density Interconnection Implemented at Low Temperature SDM2007-276 |
Naoya Watanabe (Kumamoto TIF), Yutaka Iwasaki, Tanemasa Asano (Kyushu Univ.) |
| (6) |
15:25-15:50 |
Through-silicon Via Interconnection for 3D Integration Using Room-temperature Bonding SDM2007-277 |
Naotaka Tanaka, Yasuhiro Yoshimura, Michihiro Kawashita (Hitachi), Toshihide Uematsu, Takahiro Naitoh, Takashi Akazawa (Renesas) |
| (7) |
15:50-16:15 |
Realistic future trend of advanced non-volatile memory and feasibility study of ultra-low-cost high-speed universal non-volatile memory SDM2007-278 |
Shigeyoshi Watanabe (SIT) |
| (8) |
16:15-16:40 |
New design technology of independent-gate controlled Double-Gate transistor for LSI SDM2007-279 |
Yu Hiroshima, Keisuke Okamoto, Shigeyoshi Watanabe (Shonan Inst. of Tech.) |
| |
16:40-16:45 |
closing address ( 5 min. ) |
| Contact Address and Latest Schedule Information |
| SDM |
Technical Committee on Silicon Device and Materials (SDM) [Latest Schedule]
|
| Contact Address |
Shigeru KAWANAKA (Toshiba)
TEL 045-776-5670, FAX 045-776-4104
E-  ge       ba |
Last modified: 2008-01-29 17:36:39
|