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Technical Committee on Computer Systems (CPSY) (Searched in: 2007)
Search Results: Keywords 'from:2007-10-25 to:2007-10-25'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CPSY | 2007-10-25 13:00 |
Kumamoto | Kumamoto University | The application of the massively parallel processor based on the matrix architecture Katsuya Mizumoto, Hiroyuki Yamasaki, Hideyuki Noda, Tetsushi Tanizaki, Takayuki Gyohten, Masami Nakajima, Motoki Higashida, Yoshihiro Okuno, Kazutami Arimoto (Renesas)  CPSY2007-24 |
We have developed programmable matrix-processor "MX-1". The MX-1 consists of MX-Core and a control CPU. The MX-Core is a... [more] | CPSY2007-24 pp.1-5 |
| CPSY | 2007-10-25 13:40 |
Kumamoto | Kumamoto University | The program development method of the massively parallel processor based on the matrix architecture. Hiroyuki Yamasaki, Katsuya Mizumoto, Hideyuki Noda, Tetsu Nishijima, Kanako Yoshida, Takeaki Sugimura, Takashi Kurafuji, Osamu Yamamoto, Yoshihiro Okuno, Kazutami Arimoto (Renesas) CPSY2007-25 |
Recently, the installed applications in the digital devices has been remarkably progressed. Considering these background... [more] | CPSY2007-25 pp.7-12 |
| CPSY | 2007-10-25 14:20 |
Kumamoto | Kumamoto University | An Implementation and evaluation of Ant Colony Optimization for massively parallel SIMD processor MX Core Mitsutaka Nakano, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ) CPSY2007-26 |
We focus on massively parallel processor based on the matrix architecture (MX Core) developed by Renesas Technology Cor... [more] |
CPSY2007-26 pp.13-18 |
| CPSY | 2007-10-25 15:10 |
Kumamoto | Kumamoto University | Acceleration of Multimedia Data Processing with CAM-Enhanced Massive-Parallel SIMD Matrix Processor Takeshi Kumaki, Masakatsu Ishizaki, Masaharu Tagami, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.), Takayuki Gyohten, Hideyuki Noda, Yasuto Kuroda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito (Renesas Technology) CPSY2007-27 |
A multimedia processor requires four capabilities, fast processing, small area size, low power consumption and programma... [more] | CPSY2007-27 pp.19-24 |
| CPSY | 2007-10-25 15:50 |
Kumamoto | Kumamoto University | Acceleration of AES Encryption with CAM-Enhanced Massive-Parallel SIMD Matrix Processor Masakatsu Ishizaki, Takeshi Kumaki, Masaharu Tagami, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.), Takayuki Gyohten, Hideyuki Noda, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology) CPSY2007-28 |
We have previously reported that the Content Addressable Memory (CAM)-enhanced massive-parallel Single Instruction Multi... [more] | CPSY2007-28 pp.25-30 |
| CPSY | 2007-10-25 16:40 |
Kumamoto | Kumamoto University | [Special Invited Talk]
Utilization of FPGA based devices for very high-speed internet communications Kei Hiraki, Yutaka Sugawara, Takeshi Yoshino, Mary Inaba (Univ. of Tokyo) CPSY2007-29 |
[more] | CPSY2007-29 pp.31-32 |
| CPSY | 2007-10-26 09:00 |
Kumamoto | Kumamoto University | An examination of hardware acceleration in FPGA placement based on SA Yoshio Sonokawa, Yuji Ariuchi, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2007-30 |
Placement is one of the steps that expend the time in the FPGA (Field Programmable Gate Array) design automation flow. ... [more] |
CPSY2007-30 pp.33-38 |
| CPSY | 2007-10-26 09:40 |
Kumamoto | Kumamoto University | Performance, Power, and Dependability Trade-off on Multiple Clusterd Core Processors Toshinori Sato (Kyushu Univ.), Toshimasa Funaki (Kyushu Inst Tech) CPSY2007-31 |
As deep submicron technologies are advanced, we face new challenges, such as power consumption and soft errors. A na... [more] | CPSY2007-31 pp.39-44 |
| CPSY | 2007-10-26 10:20 |
Kumamoto | Kumamoto University | PSI-NSIM: A Parallel Interconnection Network Simulator for Performance Analysis of Large-scale Parallel Systems Hidetomo Shibamura (ISIT), Ryutaro Susukita (Fukuoka IST), Hiroaki Honda, Yuichi Inadomi, Yunqing Yu, Koji Inoue, Mutsumi Aoyagi (Kyushu Univ.) CPSY2007-32 |
This paper presents an interconnection network simulator, PSI-NSIM, toward designing and performance analysis of large-s... [more] | CPSY2007-32 pp.45-50 |
| CPSY | 2007-10-26 11:10 |
Kumamoto | Kumamoto University | Routing Performance Evaluation for Stationary End Nodes in Ad Hoc Network Takuo Nakashima (Kyushu Tokai University/Kumamoto Univ.), Toshinori Sueyoshi (Kumamoto University) CPSY2007-33 |
[more] | CPSY2007-33 pp.51-56 |
| CPSY | 2007-10-26 11:50 |
Kumamoto | Kumamoto University | Kernel Protection Mechanism of Dynamic Running Mode Switch of Application Program for AnT Tadato Nishina, Masanori Umemoto, Hideo Taniguchi (Okayama Univ.), Kazutoshi Yokoyama (NTT DATA) CPSY2007-34 |
We have been developing AnT operating system with adaptability and toughness. AnT is based on micro-kernel architecture... [more] |
CPSY2007-34 pp.57-62 |
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