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Technical Committee on Reconfigurable Systems (RECONF) (Searched in: 2008)
Search Results: Keywords 'from:2008-09-25 to:2008-09-25'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2008-09-25 13:00 |
Okayama | Okayama Univ. | Acceleration of two-dimensional liquid simulation using FPGAs Anna Sato, Yuichi Okuyama (Aizu Univ), Tsuyoshi Hamada (Nagasaki Univ), Junji Kitamichi, Kenichi Kuroda (Aizu Univ)  RECONF2008-23 |
Simulations of behaviors of water as liquid are quite important in the fields of video pictures and disaster analysis an... [more] | RECONF2008-23 pp.1-6 |
| RECONF | 2008-09-25 13:30 |
Okayama | Okayama Univ. | Implementation of JPEG Encoder on Dynamically Reconfigurable Processor and its Evaluation Naomichi Furushima, Nobuya Watanabe, Akira Nagoya (Okayama Univ) RECONF2008-24 |
Recently, dynamically reconfigurable hardware has been attracted, the research becomes active, and quantitative evaluati... [more] | RECONF2008-24 pp.7-12 |
| RECONF | 2008-09-25 14:00 |
Okayama | Okayama Univ. | An Implementation of road sign recognition algorithm using levenshtein distance on FPGA Souichi Shimizu (Keio Univ.), Yoshiaki Ajioka (Ecchandesu Inc.), Masatoshi Arai, Daisuke Konno, Tomomichi Nanba (CalsonicKansei Co.), Hideharu Amano (Keio Univ.) RECONF2008-25 |
A novel template matching algorithm for road signboard recognition is proposed. By using Levenshtein distance, the shif... [more] |
RECONF2008-25 pp.13-20 |
| RECONF | 2008-09-25 14:30 |
Okayama | Okayama Univ. | An automatic combine algorithm of arithmetic pipelines for an FPGA-based biochemical simulator focused on similarities of rate law functions Hideki Yamada, Tomoya Ishimori, Yuichiro Shibata (Nagasaki Univ.), Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Hideharu Amano, Akira Funahashi (Keio Univ.), Noriko Hiroi (EMBL-EBI), Kiyoshi Oguri (Nagasaki Univ.) RECONF2008-26 |
[more] | RECONF2008-26 pp.21-26 |
| RECONF | 2008-09-25 15:10 |
Okayama | Okayama Univ. | A Proposal of the Network Switch for a PC cluster that can change connection of Distributed Shared Memory Yoshimasa Ohnishi, Takaichi Yoshida (Kyushu Institute of Tech.) RECONF2008-27 |
Small-scale PC clusters which are composed of some tens of nodes do not have enough resources. Such small-scale PC clust... [more] | RECONF2008-27 pp.27-32 |
| RECONF | 2008-09-25 15:40 |
Okayama | Okayama Univ. | A Hardware Evaluation System for 2D Interconnection Networks by using an FPGA Based Network Card Akira Uejima, Masaki Kohata (Okayama Univ. of Sci.) RECONF2008-28 |
This paper describes an FPGA based network interface card for PC clusters and a hardware network evaluation system by us... [more] | RECONF2008-28 pp.33-38 |
| RECONF | 2008-09-25 16:10 |
Okayama | Okayama Univ. | An Implementation of Operating System Functions for a Distributed FPGA Cluster System Akira Kojima, Kazuya Tokunaga, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2008-29 |
[more] | RECONF2008-29 pp.39-44 |
| RECONF | 2008-09-25 17:00 |
Okayama | Okayama Univ. | [Invited Talk]
Operating System and Reconfigurable Hardware Hideo Taniguchi (Okayama Univ.) RECONF2008-30 |
[more] | RECONF2008-30 pp.45-50 |
| RECONF | 2008-09-26 09:30 |
Okayama | Okayama Univ. | A measurement of retention time of a dynamic optically reconfigurable gate array with large gates Daisaku Seto, Minoru Watanabe (Shizuoka Univ.) RECONF2008-31 |
[more] | RECONF2008-31 pp.51-56 |
| RECONF | 2008-09-26 10:00 |
Okayama | Okayama Univ. | Development of Digit-serial Floating Point Units for Scientific Computation Engine Taiga Ban, Yu Shiraishi, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2008-32 |
We have developed a novel reconfigurable processor with high performance and high precision floating point arithmetic un... [more] | RECONF2008-32 pp.57-62 |
| RECONF | 2008-09-26 10:30 |
Okayama | Okayama Univ. | Exploration of Input Granularity Optimization for Variable Grain Logic Cell Masahiro Koga, Hiroshi Miura, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2008-33 |
A Reconfigurable Logic Device (RLD), which has circuit programmability, is applied to embedded systems as a hardware Int... [more] | RECONF2008-33 pp.63-68 |
| RECONF | 2008-09-26 11:00 |
Okayama | Okayama Univ. | Practice Evaluation Dynamically Reconfigurable Processor MuCCRA-2β Yoshiki Saito, Masaru Kato, Shotaro Saito, Toru Sano, Keiichiro Hirai, Takashi Nishimura, Takuro Nakamura, Satoshi Tsutsumi, Yohei Hasegawa, Hideharu Amano (Keio Univ.) RECONF2008-34 |
Dynamically Reconfigurable Processing Array (DRPA) have been received an attention as a flexible and efficient off-loadi... [more] | RECONF2008-34 pp.69-74 |
| RECONF | 2008-09-26 12:50 |
Okayama | Okayama Univ. | A Case Study of Reliable Softcore Processor Using TMR Technique Yoshihiro Ichinomiya, Shiro Tanoue, Tomoyuki Ishida, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2008-35 |
SRAM-based FPGA has lower reliability than dedicated integrated circuit because of radiation effect. We focus on TMR (Tr... [more] | RECONF2008-35 pp.75-80 |
| RECONF | 2008-09-26 13:20 |
Okayama | Okayama Univ. | A study of a fault-tolerant System using TFT method Atsuhiro Kanamaru, Hiroyuki Kawai, Yoshiki Yamaguchi, Moritoshi Yasunaga (Univ. of Tsukuba) RECONF2008-36 |
This paper deals with a dependable computing system using a reconfigurable device. The work carried out for this purpos... [more] | RECONF2008-36 pp.81-86 |
| RECONF | 2008-09-26 13:50 |
Okayama | Okayama Univ. | Consideration of Combinational Circuit Mapping Method for Reconfigurable Device MPLD Yutaro Oda, Kazuya Tanigawa, Tetsuo Hironaka, Naoki Hirakawa, Hiroaki Toguchi (Hiroshima City Univ.), Masayuki Sato (Taiyo Yuden) RECONF2008-37 |
As a novel Field Programmable Gate Array(FPGA), MPLD has been proposed. The MPLD consists of MLUTs. which has functions ... [more] | RECONF2008-37 pp.87-92 |
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