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Technical Committee on Superconductive Electronics (SCE) (Searched in: 2017)
Search Results: Keywords 'from:2017-08-09 to:2017-08-09'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| SCE | 2017-08-09 11:00 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Demonstration of Quantum Flux Parametron without DC Offset Currents using Ferromagnets Hayato Iwashita, Hiroshi Ito, Soya Taniguchi, Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.)  SCE2017-11 |
[more] | SCE2017-11 pp.1-5 |
| SCE | 2017-08-09 11:25 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Energy evaluation of the feedback latch using AQFP logic Mai Nozoe, Naoki Takeuti, Christopher Ayala, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2017-12 |
We are studying adiabatic quantum flux parametron (AQFP), which is an ultra-low-power superconductor device. We have bee... [more] | SCE2017-12 pp.7-12 |
| SCE | 2017-08-09 11:50 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Yield Evaluation of 90k Junction-scale Adiabatic Quantum-Flux-Parametron Circuits Fumihiro China, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (YNU) SCE2017-13 |
[more] | SCE2017-13 pp.13-18 |
| SCE | 2017-08-09 13:20 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Evaluation of a random access memory cell composed of quantum flux parametron Hiroshi Takayama, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2017-14 |
Adiabatic quantum-flux-parametron (AQFP) logic has a potential to become a basic technology to realize an ultra-low-powe... [more] | SCE2017-14 pp.19-23 |
| SCE | 2017-08-09 13:45 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Design and evaluation of 2 × 2 look-up table and extension to 4 × 4 for realization of FPGA using single flux quantum circuits Mika Araki, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2017-15 |
[more] | SCE2017-15 pp.25-29 |
| SCE | 2017-08-09 14:10 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Demonstration of AQFP/CMOS hybrid system and design and measurement of an AQFP 16-bit MUX Yukihiro Okuma, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2017-16 |
[more] | SCE2017-16 pp.31-36 |
| SCE | 2017-08-09 14:35 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Design of Component Circuits for Rapid Single-Flux-Quantum Gate-Level-Pipelined Microprocessors Yuki Hatanaka, Yuichi Matsui, Masamitsu Tanaka, Kyosuke Sano, Akira Fujimaki (Nagoya Univ.), Koki Ishida, Takatsugu Ono, Koji Inoue (Kyushu Univ.) SCE2017-17 |
We have started development of high-throughput rapid single-flux-quantum (RSFQ) microprocessors with the aim of higher p... [more] | SCE2017-17 pp.37-42 |
| SCE | 2017-08-09 15:15 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Improvement of double oscillator type SFQ time-to-digital converter and realization of high temporal resolution Yuma Tomitsuka, Yutaka Abe (Yokohama National Univ.), Nobuyuki Zen (NAIST), Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2017-18 |
[more] | SCE2017-18 pp.43-48 |
| SCE | 2017-08-09 15:40 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Design of Digital SQUID using sub-SFQ Feedback with High Sampling Rate Kosuke Okabe, Masato Naruse, Tohru Taino, Hiroaki Myoren (Saitama Univ.) SCE2017-19 |
Digital SQUIDs based on single-flux quantum (SFQ) logic have attractive characteristics such as wide dynamic ranges and ... [more] | SCE2017-19 pp.49-53 |
| SCE | 2017-08-09 16:05 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Design of Low-latency SFQ Up/Down Counter for Digital Signal Processing Ryotaro Kamiya, Masato Naruse, Tohru Taino, Hiroaki Myoren (Saitama Univ.) SCE2017-20 |
Signal processing circuits using the single flux quantum (SFQ) logic are needed to have high-speed and low-latency opera... [more] | SCE2017-20 pp.55-59 |
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