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Technical Committee on Superconductive Electronics (SCE)  (Searched in: 2009)

Search Results: Keywords 'from:2009-10-20 to:2009-10-20'
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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 7 of 7  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SCE 2009-10-20
13:00		 Tokyo Kikai-Shinko-Kaikan Bldg. A Logic Design Verification Method for SFQ Circuits Considering Pipeline Processing Behavior
Motoki Sato, Masamitsu Tanaka, Kazuyoshi Takagi, Naofumi Takagi (Nagoya Univ) SCE2009-17		 We propose a verification method of pipeline processing behavior of SFQ circuits. SFQ logic circuits work synchronously ... [more] SCE2009-17
pp.1-6
SCE 2009-10-20
13:25		 Tokyo Kikai-Shinko-Kaikan Bldg. A clock line for a Large Scale Reconfigurable Data Paths Processor
Irina Kataeva, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ.v) SCE2009-18		 Clocking of the large scale SFQ circuits is a major issue due to accumulated jitter and clock skew that grow with the in... [more] SCE2009-18
pp.7-11
SCE 2009-10-20
13:50		 Tokyo Kikai-Shinko-Kaikan Bldg. Design of SFQ Floating-Point Units Using Nb Advanced Process
Toshiki Kainuma, Yasuhiro Shimamura, Fumishige Miyaoka, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Nat. Univ.), Akira Fujimaki, Naofumi Takagi, Kazuyoshi Takagi (Nagoya Univ.) SCE2009-19		 We are developing a large-scale reconfigurable data-path (LSRDP) based on the single-flux-quantum (SFQ) circuits, which ... [more] SCE2009-19
pp.13-18
SCE 2009-10-20
14:30		 Tokyo Kikai-Shinko-Kaikan Bldg. Dynamically Reconfigurable Single Flux Quantum Logic Gates
Yuki Yamanashi, Ichiro Okawa, Nobuyuki Yoshikawa (Yokohama Nat. Univ.) SCE2009-20		 Novel reconfigurable superconductive single flux quantum logic gates, the function of which can be dynamically defined b... [more] SCE2009-20
pp.19-23
SCE 2009-10-20
14:55		 Tokyo Kikai-Shinko-Kaikan Bldg. Access Time Measurement of 64 kb Josephson/CMOS Hybrid Memories using SFQ Time-to-Digital Converter
Yuji Okamoto, Heejoung Park, Hyunjoo Jin, Kenta Yaguchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2009-21		 We have been developing a Josephson/CMOS hybrid memory, which enables the sub-nanosecond access time to overcome a memor... [more] SCE2009-21
pp.25-29
SCE 2009-10-20
15:20		 Tokyo Kikai-Shinko-Kaikan Bldg. Analysis of gray zone in QOSs
Shigeyuki Miyajima, Yosuke Higashi, Isao Nakanishi, Akira Fujimaki (Nagoya Univ.) SCE2009-22		 We describe the analysis of gray zone in QOS (Quasi-One-junction SQUID) working as a 1-bit comparator. However we have a... [more] SCE2009-22
pp.31-35
SCE 2009-10-20
15:45		 Tokyo Kikai-Shinko-Kaikan Bldg. Development of SFQ circuit for compact neutron detector
Isao Nakanishi, Shigeyuki Miyajima, Yosuke Higashi, Akira Fujimaki (Nagoya Univ.) SCE2009-23		 We have demonstrated an SFQ signal processor prototype composed of quasi-one-junction SQUID (QOS) comparators, time-to-d... [more] SCE2009-23
pp.37-39
 Results 1 - 7 of 7  /   
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