IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

Technical Committee on VLSI Design Technologies (VLD)  (Searched in: 2011)

Search Results: Keywords 'from:2012-03-06 to:2012-03-06'

[Go to Official VLD Homepage (Japanese)] 
Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 21 - 25 of 25 [Previous]  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD 2012-03-07
14:10
Oita B-con Plaza Power Efficient Design of Arithmetic Circuits Based on Embedded Memory Blocks in FPGA
Xinmu Yu (Waseda Univ.), Kiyoharu Hamaguchi (Osaka Univ.), Shinji Kimura (Waseda Univ.) VLD2011-140
 [more] VLD2011-140
pp.121-126
VLD 2012-03-07
14:35
Oita B-con Plaza Performance of the Evaluation of a Variable-Latency-Circuit on FPGA
Yuuta Ukon, Kenta Ando, Atsushi Takahashi (Osaka Univ) VLD2011-141
The performance of integrated circuits, which are the base of ICT nowaday,
is always requested to be improved.
In de f... [more]
VLD2011-141
pp.127-132
VLD 2012-03-07
15:15
Oita B-con Plaza Power-Switch Drive-circuit generation for Ground-Bounce reduction using the Genetic-Programming
Makoto Miyauchi, Masaru Kudo, Yuya Ohta, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2011-142
Ground Bounce noise is a serious problem Power Gating technology. In this research, as compared with the Daisy Chain whi... [more] VLD2011-142
pp.133-138
VLD 2012-03-07
15:40
Oita B-con Plaza A Design of Low-Power Color Interporation Circuits Based on Color Difference
Kouta Omobayashi, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) VLD2011-143
Color interpolation, reproducing the original colors from restricted color information of a given image, is an im- porta... [more] VLD2011-143
pp.139-144
VLD 2012-03-07
16:05
Oita B-con Plaza Leakage Energy Reduction of Sub-Threshold Circuits by Body Bias Control for Power Switch
Ryo Mitsuhashi, Masaru Kudo, Yuya Ohta, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2011-144
Power Gating (PG) is one of the technologies for reducing leakage energy. The effectiveness of leakage energy reduction ... [more] VLD2011-144
pp.145-150
 Results 21 - 25 of 25 [Previous]  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan