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Technical Committee on Hardware Security (HWS) (Searched in: 2019)
Search Results: Keywords 'from:2019-11-01 to:2019-11-01'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| HWS, ICD [detail] | 2019-11-01 13:00 |
Osaka | DNP Namba SS Bld. | Implementation and Evaluation of EC-ElGamal Encryption with a Twisted Montgomery Curve over Tower Field on Arduino Yuta Hashimoto, Tadaki Kanenari, Takuya Kusaka, Yasuyuki Nogami (Okayama Univ.)  HWS2019-57 ICD2019-18 |
[more] | HWS2019-57 ICD2019-18 pp.1-5 |
| HWS, ICD [detail] | 2019-11-01 13:25 |
Osaka | DNP Namba SS Bld. | An Implementation of Tate and Ate Pairing of Embedding Degree 14 Zihao Song, Rikuya Matsumura, Yuki Nanjo, Yasuyuki Nogami, Takuya Kusaka (Okayama Univ.) HWS2019-58 ICD2019-19 |
Following a coming new age of IoT (Internet of Things) and tremendous growth of processing power of a personal computer... [more] |
HWS2019-58 ICD2019-19 pp.7-12 |
| HWS, ICD [detail] | 2019-11-01 13:50 |
Osaka | DNP Namba SS Bld. | A Study on Correlation Electromagnetics Analysis on Pairing-based Cryptographic Hardware of Unified Hardware Yuma Kadowaki, Rei Ueno, Ville Yli-Mäyry (Tohoku Univ.), Daisuke Fujimoto, Yuichi Hayashi (NAIST), Makoto Nagata (Kobe Univ.), Makoto Ikeda (UT), Tsutomu Matsumto (YNU), Naofumi Homma (Tohoku Univ.) HWS2019-59 ICD2019-20 |
[more] | HWS2019-59 ICD2019-20 pp.13-18 |
| HWS, ICD [detail] | 2019-11-01 14:15 |
Osaka | DNP Namba SS Bld. | A Design of Isogeny-Based Cryptographic Hardware Architecture Using Residue Number System Shuto Funakoshi, Rei Ueno, Naofumi Homma (Tohoku Univ.) HWS2019-60 ICD2019-21 |
In this paper, we will propose an efficient hardware architecture of isogeny-based cryptography. The proposed architectu... [more] | HWS2019-60 ICD2019-21 pp.19-24 |
| HWS, ICD [detail] | 2019-11-01 14:55 |
Osaka | DNP Namba SS Bld. | Countermeasures for power noise and side-channel leakage in crypto modules (Ⅱ) Kazuki Monta, Akihiro Tsukioka, Daichi Nakagawa, Kazuki Yasuoka, Noriyuki Miura, Makoto Nagata (Kobe Univ.), Karthik Srinivasan, Shan Wan, Lang Lin, Ying-Siun Li, Norman Chang (ANSYS) HWS2019-61 ICD2019-22 |
[more] | HWS2019-61 ICD2019-22 pp.25-28 |
| HWS, ICD [detail] | 2019-11-01 15:20 |
Osaka | DNP Namba SS Bld. | Fundamental study on an estimation method of output bits from TERO-based TRNG during frequency injection attack Saki Osuka, Daisuke Fujimoto, Yuichi Hayashi (NAIST) HWS2019-62 ICD2019-23 |
True random number generators (TRNGs) based on ring oscillators (ROs) are employed in many devices because they can be c... [more] | HWS2019-62 ICD2019-23 pp.29-34 |
| HWS, ICD [detail] | 2019-11-01 16:00 |
Osaka | DNP Namba SS Bld. | A Study of Hardware Trojan Detection Method using Deep Learning in Asynchronous Circuits Hikaru Inafune, Masashi Imai (Hirosaki Univ.) HWS2019-63 ICD2019-24 |
There are typically two timing methods in VLSI designs known as synchronous circuits which use a global clock and async... [more] |
HWS2019-63 ICD2019-24 pp.35-40 |
| HWS, ICD [detail] | 2019-11-01 16:25 |
Osaka | DNP Namba SS Bld. | Demonstration of Adversarial Examples for Hardware Trojan Detection Kohei Nozawa, Kento Hasegawa (Waseda Univ.), Seira Hidano, Shinsaku Kiyomoto (KDDI Research), Kazuo Hashimoto, Nozomu Togawa (Waseda Univ.) HWS2019-64 ICD2019-25 |
(To be available after the conference date) [more] | HWS2019-64 ICD2019-25 pp.41-46 |
| HWS, ICD [detail] | 2019-11-01 16:50 |
Osaka | DNP Namba SS Bld. | Physical-level detection approach against hardware Trojans inside semiconductor chips (I) Shinichi Kawamura, Kentaro Imafuku, Hirofumi Sakane, Yohei Hori (AIST), Makoto Nagata (AIST/Kobe Univ.), Yuichi Hayashi (AIST/NAIST), Tsutomu Matsumoto (AIST/YNU) HWS2019-65 ICD2019-26 |
It is of great concern that malicious hardware should be inserted inside semiconductor chips and on printed circuit boar... [more] | HWS2019-65 ICD2019-26 pp.47-52 |
| HWS, ICD [detail] | 2019-11-01 17:15 |
Osaka | DNP Namba SS Bld. | HWS2019-66 ICD2019-27 |
(To be available after the conference date) [more] | HWS2019-66 ICD2019-27 pp.53-58 |
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