Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
CPSY, DC, RECONF, IPSJ-ARC [detail] |
2024-08-09 14:50 |
Tokushima |
Awagin Hall (Primary: On-site, Secondary: Online) |
CPSY2024-36 DC2024-36 RECONF2024-36 |
This study focuses on interdependent networks. The objective of this study is to solve the problem of selecting a given ... [more] |
CPSY2024-36 DC2024-36 RECONF2024-36 pp.112-117 |
CPSY, DC, RECONF, IPSJ-ARC [detail] |
2024-08-09 16:20 |
Tokushima |
Awagin Hall (Primary: On-site, Secondary: Online) |
Vlog Resharding for High-Performance Range Query in Key-Value Store Naoto Sugiura (Keio Univ.), Daichi Fujiki (Titech) CPSY2024-37 DC2024-37 RECONF2024-37 |
(To be available after the conference date) [more] |
CPSY2024-37 DC2024-37 RECONF2024-37 pp.118-123 |
CPSY, DC, RECONF, IPSJ-ARC [detail] |
2024-08-09 16:45 |
Tokushima |
Awagin Hall (Primary: On-site, Secondary: Online) |
Acceleration of Binary128 Matrix Multiplication with Applications by FPGA Fumiya Kono (SIST), Naohito Nakasato (UoA), Mao Nakata (RIKEN) CPSY2024-38 DC2024-38 RECONF2024-38 |
[more] |
CPSY2024-38 DC2024-38 RECONF2024-38 pp.124-129 |
CPSY, DC, RECONF, IPSJ-ARC [detail] |
2024-08-09 17:25 |
Tokushima |
Awagin Hall (Primary: On-site, Secondary: Online) |
TMR/DMR adaptive soft-error tolerant redundant system using FPGA cluster Homu Omura, Kazuteru Namba (Chiba Univ.) CPSY2024-39 DC2024-39 RECONF2024-39 |
In recent years, the probability of soft error occurrence has increased due to the miniaturization of semiconductor devi... [more] |
CPSY2024-39 DC2024-39 RECONF2024-39 pp.130-134 |
CPSY, DC, RECONF, IPSJ-ARC [detail] |
2024-08-09 17:50 |
Tokushima |
Awagin Hall (Primary: On-site, Secondary: Online) |
CPSY2024-40 DC2024-40 RECONF2024-40 |
This paper describes automatic circuit partitioning method for multi-FPGAs with high-level synthesis. First, A multi-FPG... [more] |
CPSY2024-40 DC2024-40 RECONF2024-40 pp.135-140 |
CPSY, DC, RECONF, IPSJ-ARC [detail] |
2024-08-09 18:15 |
Tokushima |
Awagin Hall (Primary: On-site, Secondary: Online) |
A Framework for reducing power consumption of multi-FPGA clusters Kensuke Iizuka (Keio Univ.), Hideharu Amano (The Univ. of Tokyo) CPSY2024-41 DC2024-41 RECONF2024-41 |
FPGA clusters are expected to execute the time-critical applications as Multi-access Edge Computing (MEC) servers.
We c... [more] |
CPSY2024-41 DC2024-41 RECONF2024-41 pp.141-146 |