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Special Interest Group on System Architecture (IPSJ-ARC) (Searched in: 2019)
Search Results: Keywords 'from:2020-01-22 to:2020-01-22'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-23 14:20 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University |  VLD2019-74 CPSY2019-72 RECONF2019-64 |
[more] | VLD2019-74 CPSY2019-72 RECONF2019-64 pp.129-134 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-23 14:45 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Study of a Simplified Digital Spiking Neuron and Its FPGA Implementation Tomohiro Yoneda (NII) VLD2019-75 CPSY2019-73 RECONF2019-65 |
A simplified digital spiking neural network implementable on FPGAs is proposed in order to reduce necessary resources an... [more] | VLD2019-75 CPSY2019-73 RECONF2019-65 pp.135-140 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-23 15:25 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | FPGA-based Stream Data Aggregation for Large Sliding-Windows Masaki Osaka (UEC), Masato Yoshimi (TIS), Celimuge Wu, Tsutomu Yoshinaga (UEC) VLD2019-76 CPSY2019-74 RECONF2019-66 |
This paper proposes an FPGA-based Stream Data Aggregation for large Sliding-Windows. We designed Configurable Query Proc... [more] | VLD2019-76 CPSY2019-74 RECONF2019-66 pp.141-146 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-23 15:50 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | () VLD2019-77 CPSY2019-75 RECONF2019-67 |
(To be available after the conference date) [more] | VLD2019-77 CPSY2019-75 RECONF2019-67 pp.147-150 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-23 16:15 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Accelerating 2D LiDAR SLAM Algorithm using FPGA Keisuke Sugiura, Hiroki Matsutani (Keio Univ.) VLD2019-78 CPSY2019-76 RECONF2019-68 |
(To be available after the conference date) [more] | VLD2019-78 CPSY2019-76 RECONF2019-68 pp.151-156 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-23 16:55 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | VLD2019-79 CPSY2019-77 RECONF2019-69 |
This talk reviews research on parallel processing and hardware algorithms for FPGAs that the speaker have been done so f... [more] | VLD2019-79 CPSY2019-77 RECONF2019-69 p.157 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 09:30 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | A Case Study of Development of Signal Processing Systems with RFSoC Ryohei Niwase (e-trees), Makoto Negoro, Yuta Kawai (Osaka Univ.), Takefumi Miyoshi (e-trees) VLD2019-80 CPSY2019-78 RECONF2019-70 |
[more] | VLD2019-80 CPSY2019-78 RECONF2019-70 pp.159-163 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 09:55 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Quantum control of electron spin qubit with RFSoC Yuta Kawai, Takato Koide, Hiroki Imawaka, Koichiro Miyanishi (Osaka Univ.), Ryohei Niwase, Takefumi Miyoshi (e-trees), Makoto Negoro, Akinori Kagawa (Osaka Univ.) VLD2019-81 CPSY2019-79 RECONF2019-71 |
Quantum computer using electron spins as qubits performs gate operations with Ku-band microwave. In this study, we devel... [more] | VLD2019-81 CPSY2019-79 RECONF2019-71 pp.165-167 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 10:20 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Virtual-Channel Implementation on Communication Circuit of FPGA Cluster by Qsys Interconnect Naohisa Fukase, Akihisa Furuiti, Yasuyuki Miura, Tsukasa-Pierre Nakao (SIT) VLD2019-82 CPSY2019-80 RECONF2019-72 |
In recent days, in order to improve the performance of computer, methods using FPGA have been attracting attention. FPGA... [more] | VLD2019-82 CPSY2019-80 RECONF2019-72 pp.169-174 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 11:00 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Parameter Aggregation using Software Switch for Multi-GPU Deep Learning Masaki Furukawa, Tomoya Itsubo, Hiroki Matsutani (Keio Univ.) VLD2019-83 CPSY2019-81 RECONF2019-73 |
(To be available after the conference date) [more] | VLD2019-83 CPSY2019-81 RECONF2019-73 pp.175-180 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 11:25 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Implementation of high speed rainbow table generation using Keccak hashing algorithm on CUDA Nguyen Dat Thuong, Keisuke Iwai, Takashi Matsubara, Takakazu Kurokawa (NDA) VLD2019-84 CPSY2019-82 RECONF2019-74 |
This paper proposes the implementation of high speed rainbow table generation using Keccak hashing algorithm with the in... [more] | VLD2019-84 CPSY2019-82 RECONF2019-74 pp.181-186 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 11:50 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Prioritized Resource Management for Reservation Stations Shota Nakabeppu, Nobuyuki Yamasaki (Keio Univ.) VLD2019-85 CPSY2019-83 RECONF2019-75 |
[more] | VLD2019-85 CPSY2019-83 RECONF2019-75 pp.187-191 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 13:30 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | An FPGA implementation of arc-sine high-radix CORDIC algorithm Hiroshi Matsuoka, Naofumi Takagi (Kyoto Univ.), Kazuyoshi Takagi (Mie Univ.) VLD2019-86 CPSY2019-84 RECONF2019-76 |
We consider the realization of the circuit on the FPGA based on the high radix CORDIC algorithm that we proposed for cal... [more] | VLD2019-86 CPSY2019-84 RECONF2019-76 pp.193-197 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 13:55 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Edge detection algorithms using stochastic architectures for various images Naoto Shinozaki, Kimiyoshi Usami (SIT) VLD2019-87 CPSY2019-85 RECONF2019-77 |
Stochastic computing (SC) is an approximate calculation method with the existence probability of 1 in a bit string as a ... [more] | VLD2019-87 CPSY2019-85 RECONF2019-77 pp.199-204 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 14:20 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | An Approach to Approximate Multiplier Optimization Xinpei Zhang, Amir Masoud Gharehbaghi, Masahiro Fujita (Univ. Tokyo) VLD2019-88 CPSY2019-86 RECONF2019-78 |
[more] | VLD2019-88 CPSY2019-86 RECONF2019-78 pp.205-210 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 14:45 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Partial synthesis method based on Column-wise verification for integer multipliers Jian Gu, Amir Masoud Gharehbaghi, Masahiro Fujita (UTokyo) VLD2019-89 CPSY2019-87 RECONF2019-79 |
Partial logic synthesis is a method that most parts of the target circuits are fixed and the missing portions can be log... [more] | VLD2019-89 CPSY2019-87 RECONF2019-79 pp.211-216 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 15:25 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Measuring SER by Neutron Irradiation Between Volatile SRAM-based and Nonvolatile Flash-based FPGAs Yuya Kawano, Yuto Tsukita, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2019-90 CPSY2019-88 RECONF2019-80 |
[more] | VLD2019-90 CPSY2019-88 RECONF2019-80 pp.217-222 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 15:50 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | VLD2019-91 CPSY2019-89 RECONF2019-81 |
[more] | VLD2019-91 CPSY2019-89 RECONF2019-81 pp.223-227 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 16:15 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | VLD2019-92 CPSY2019-90 RECONF2019-82 |
[more] | VLD2019-92 CPSY2019-90 RECONF2019-82 pp.229-232 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 16:40 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Study of stacked type logic LSI with fabrication technology of 3D flash memory. Fumiya Suzuki, Shigeyoshi Watanabe (Shonan Inst of Tech.) VLD2019-93 CPSY2019-91 RECONF2019-83 |
[more] | VLD2019-93 CPSY2019-91 RECONF2019-83 pp.233-238 |
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