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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2005-07-15
09:30
Aichi Toyohashi Univ. of Tech. A 1V Supply Low Noise CMOS Amplifier Using Noise Reduction Techniques of Autozeroing and Chopper Stabilization
Yoshihiro Masui, Takayuki Mashimo, Takeshi Yoshida, Mamoru Sasaki, Atsushi Iwata (Hiroshima Univ)
A low-noise CMOS amplifier operating at a 1-V supply voltage is developed using the two noise reduction techniques of au... [more] ICD2005-55
pp.1-6
ICD 2005-07-15
09:55
Aichi Toyohashi Univ. of Tech. JFET-CMOS Low Noise Operational Amplifier for Sensor Interface Applications
Yusuke Edo, Hidekuni Takao, Kazuaki Sawada, Makoto Ishida (Toyohashi Univ. of Tech.)
In this paper,an integration technology of JFET in CMOS circuits is presented. MOSFETs essentially has large 1/f noise a... [more] ICD2005-56
pp.7-12
MW, SCE 2005-04-27
14:20
Tokyo Kikai-Shinko-Kaikan Bldg. Design of CPW Matching Circuit for 5GHz Band Low Noise Amplifier
Fuminori Koga, Haruichi Kanaya, Keiji Yoshida (Kyushu Univ.)
We study to make an amplifier and the matching circuit a on- chip. We designed the matching circuit with an impedance in... [more] SCE2005-6 MW2005-6
pp.27-32
MW, ED 2005-01-18
16:40
Tokyo   -
Kazuya Yamamoto, Satoshi Suzuki, Nobuyuki Ogawa, Kenichiro Choumei, Teruyuki Shimura, Kosei Maemura (Mitsubishi Electric)
This paper describes the circuit design and measurement results of an InGaP/GaAs HBT MMIC low-noise amplifier (LNA) for ... [more] ED2004-226 MW2004-233
pp.83-87
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