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All Technical Committee Conferences (Searched in: All Years)
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| Search Results: Conference Papers |
| Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| ICD, VLD |
2007-03-08
10:50 |
Okinawa |
Mielparque Okinawa |
A 90-nm SRAM for Video Signal Processors implementing Dynamic Voltage and Frequency Scaling
Takeshi Iwanari, Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
VLD2006-125 ICD2006-216
pp.37-42 |
| ICD, VLD |
2007-03-08
11:50 |
Okinawa |
Mielparque Okinawa |
Low Power and High Speed Clock Distribution Technique for 90-nm CMOS LSIs
Yousuke Hagiwara, Suguru Nagayama, Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
VLD2006-128 ICD2006-219
pp.55-60 |
| ICD, SDM |
2006-08-17
17:00 |
Hokkaido |
Hokkaido University |
Low Dynamic Power and High Speed 90-nm CMOS Clock Driver
Yousuke Hagiwara, Suguru Nagayama, Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Uni.) |
The power dissipation (PT) and delay time (tT) of CMOS clock network, that consisted of a clock driver and register circ... [more] |
SDM2006-140 ICD2006-94
pp.87-92 |
| ICD |
2005-12-16
09:50 |
Kochi |
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A Low Dynamic Power and Low Leakage Power 90-nm CMOS Clock Driver
Suguru Nagayama, Tadayoshi Enomoto (Chuo Univ.) |
A technique, which can minimize not only an active power (Pat) and an stand-by power (Pst) but also a delay time (td) of... [more] |
ICD2005-194
pp.13-18 |
| ICD, SDM |
2005-08-18
15:20 |
Hokkaido |
HAKODATE KOKUSAI HOTEL |
A Low Dynamic Power and Low Leakage Power CMOS Square-Root Circuit
Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.) |
(Advance abstract in Japanese is available) [more] |
SDM2005-140 ICD2005-79
pp.73-78 |
| ICD, SDM |
2005-08-18
16:20 |
Hokkaido |
HAKODATE KOKUSAI HOTEL |
SOI; the Trump Card of SOCs in Sub. 50-nm Era
-- Techniques that SOI Conquers Bulk! --
Tadayoshi Enomoto (Chuo Univ.), Takakuni Douseki (NTT), Kazutami Arimoto (Renesas), Jiroh Ida (Oki), Takashi Ipposhi (Renesas), Kazuhiko Miki (Toshiba), Masanao Yamaoka (Hitachi), Makoto Yoshimi (SOITEC) |
(Advance abstract in Japanese is available) [more] |
SDM2005-142 ICD2005-81
pp.85-90 |
| ICD, SDM |
2005-08-19
15:15 |
Hokkaido |
HAKODATE KOKUSAI HOTEL |
High-k; Last Card for the Leakage Currents
Tadayoshi Enomoto (Chuo Univ.), Mariko Takayanagi (Toshiba), Shigeo Satoh (Fujitu), Koji Nii (Renesas), Akira Nishiyama (Toshiba), ハセ タカシ (NEC), Mototsugu Hamada (Toshiba), Jiro Yugami (Renesas) |
(Advance abstract in Japanese is available) [more] |
SDM2005-155 ICD2005-94
pp.73-78 |
| VLD, ICD |
2005-03-10
- 2005-03-11 |
Okinawa |
Mielparque Okinawa |
High-Speed Low-Power 90-nm CMOS 16:1 Multiplexer
Ryota Isozaki, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
VLD2004-130 ICD2004-226
pp.35-40 |
| VLD, ICD |
2005-03-10
- 2005-03-11 |
Okinawa |
Mielparque Okinawa |
Low Leakage Power 90-nm CMOS SRAM Incorporating a Self-controllable Voltage Level (SVL) Circuit
Yuki Higuchi, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
VLD2004-129 ICD2004-225
pp.29-34 |
| VLD, ICD |
2005-03-10
- 2005-03-11 |
Okinawa |
Mielparque Okinawa |
Low-Power High-Speed 180-nm CMOS Clock Driver
Suguru Nagayama, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
VLD2004-128 ICD2004-224
pp.23-28 |
| ICD |
2004-12-17
11:00 |
Hiroshima |
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0.13-μm CMOS、10-Gbps、16:1 Low-Power Multiplexer
Ryouta Isozaki, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
ICD2004-195
pp.13-18 |
| IE, SIP, ICD, IPSJ-SLDM |
2004-10-21
13:25 |
Yamagata |
|
Fast Motion Vector Estimation employing Adaptively Assigned Search Area Sizes Followed by Hierarchical Sub-Sampling-Block-Matching
Koutarou Oguma, Mitsuhiro Kitani, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
SIP2004-83 ICD2004-115 IE2004-59
pp.43-48 |
| IE, SIP, ICD, IPSJ-SLDM |
2004-10-21
13:50 |
Yamagata |
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"Multi-Step Breaking-off-Search(MS-BOS)" Motion Estimation Algorithm and Low-PowerCMOS-ME LSI
Syouta Hasegawa, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
SIP2004-84 ICD2004-116 IE2004-60
pp.49-54 |
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