IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 7 of 7  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2016-01-28
15:20
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] MTJ based "Normally-off processors" with thermal stability factor engineered perpendicular MTJ, L2 cache based on 2T-2MTJ cell, L3 and Last Level Cache based on 1T-1MTJ cell and novel error handling scheme
Kazutaka Ikegami, Hiroki Noguchi, Satoshi Takaya, Chikayoshi Kamata, Minoru Amano, Keiko Abe, Keiichi Kushida, Eiji Kitagawa, Takao Ochiai, Naoharu Shimomura, Daisuke Saida, Atsushi Kawasumi, Hiroyuki Hara, Junichi Ito, Shinobu Fujita (Toshiba) SDM2015-126
MTJ-based cache memory is expected to reduce processor power significantly. However, write energy increases rapidly for ... [more] SDM2015-126
pp.27-30
ICD 2015-04-17
12:40
Nagano   [Invited Talk] Low-power Embedded Perpendicular STT-MRAM Design for Cache Memory
Hiroki Noguchi, Kazutaka Ikegami, Keiichi Kushida, Keiko Abe, Shogo Itai, Satoshi Takaya, Chika Tanaka, Chikayoshi Kamata, Minoru Amano, Eiji Kitagawa, Naoharu Shimomura, Atsushi Kawasumi, Hiroyuki Hara, Junichi Ito, Shinobu Fujita (Toshiba) ICD2015-10
 [more] ICD2015-10
pp.45-50
MRIS, ITE-MMS 2014-10-03
09:30
Niigata Kashiwazaki energy hall, Niigata *
Daisuke Saida, Naoharu Shimomura, Eiji Kitagawa, Chikayoshi Kamata, Megumi Yakabe, Yuuichi Osawa, Shinobu Fujita, Junichi Ito (Toshiba) MR2014-18
(To be available after the conference date) [more] MR2014-18
pp.27-31
SDM 2014-01-29
13:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Variable Nonvolatile Memory Arrays for Adaptive Computing Systems
Hiroki Noguchi, Susumu Takeda, Kumiko Nomura, Keiko Abe, Kazutaka Ikegami, Eiji Kitagawa, Naoharu Shimomura, Junichi Ito, Shinobu Fujita (Toshiba) SDM2013-141
 [more] SDM2013-141
p.29
MRIS, ITE-MMS 2013-07-12
16:35
Tokyo Chuo Univ. Progress on STT MTJ writing Technology and the Effect on Normally-off Computing Systems
Junichi Ito, Hiroaki Yoda, Shinobu Fujita, Naoharu Shimomura, Eiji Kitagawa, Keiko Abe, Kumiko Nomura, Hiroki Noguchi (Toshiba) MR2013-13
We propose a new processor using STT-MRAMs as cache memories. It enables “Normally-off computing”, where the processor i... [more] MR2013-13
pp.37-41
ICD 2013-04-11
15:30
Ibaraki Advanced Industrial Science and Technology (AIST) [Invited Talk] Novel Vertical Magnetization STT-MRAM Technologies for Reducing Power of High Performance Mobile Processors
Shinobu Fujita, Keiko Abe, Hiroki Noguchi, Kumiko Nomura, Eiji Kitagawa, Naoharu Shimomura, Junichi Ito, Hiroaki Yoda (Toshiba) ICD2013-8
 [more] ICD2013-8
pp.39-40
ICD 2008-04-18
14:45
Tokyo   Experimental proof of spin transfer switching in MRAM cell using TbCoFe/CoFeB layers with perpendicular magnetic anisotropy
Masahiko Nakayama, Tadashi Kai, Naoharu Shimomura, Minoru Amano, Eiji Kitagawa, Toshihiko Nagase, Masatoshi Yoshikawa, Tatsuya Kishi, Sumio Ikegawa, Hiroaki Yoda (R&D Center, Toshiba Corp.) ICD2008-14
(To be available after the conference date) [more] ICD2008-14
pp.75-78
 Results 1 - 7 of 7  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan