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Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF, CPSY, VLD, IPSJ-SLDM 2008-01-17
14:35
Kanagawa Hiyoshi Campus, Keio University Functionally-partitioned JPEG decoder for partial dynamic reconfiguration
Taiichiro Yatsunami, Hideaki Yoshihiro, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) VLD2007-129 CPSY2007-72 RECONF2007-75
 [more] VLD2007-129 CPSY2007-72 RECONF2007-75
pp.65-70
VLD, CPSY, RECONF, IPSJ-SLDM 2007-01-18
14:55
Tokyo Keio Univ. Hiyoshi Campus Adoption and Evaluation of FPGA Partial Reconfiguration for a Run-time Reconfigurable System
Yukinobu Kiyota, Taiichiro Yatsunami, Takeru Kisanuki, Hideaki Yoshihiro, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
FPGA partial reconfiguration is the technique which make FPGA more flexible. We have studied about partial reconfigurati... [more] VLD2006-103 CPSY2006-74 RECONF2006-74
pp.55-60
RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC
(Joint) [detail]
2006-11-30
15:25
Fukuoka Kitakyushu International Conference Center An example of function sharing implementation for reconfigurable systems
Hideaki Yoshihiro, Takeru Kisanuki, Taiichiro Yatsunami, Yukinobu Kiyota, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto City Univ.)
 [more] RECONF2006-54
pp.61-66
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