|
|
All Technical Committee Conferences (Searched in: All Years)
|
|
Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
|
Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
HWS (2nd) |
2018-12-13 14:40 |
Tokyo |
Tokyo Univ. Takeda Bldg. Takeda Hall |
RISCV-based Hardware Root-Of-Trust for Secure IoT Device Lifecycle Management Thomas Edison Yu (Rambus K.K.) |
(Advance abstract in Japanese is available) [more] |
|
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-21 14:40 |
Fukuoka |
Kitakyushu International Conference Center |
Thermal-Aware Test Scheduling with Cycle-Accurate Power Profiles and Test Partitioning Thomas Edison Yu, Tomokazu Yoneda (NAIST), Krishnendu Chakrabarty (Duke Univ.), Hideo Fujiwara (NAIST) VLD2007-84 DC2007-39 |
Higher power densities and the non-linear spatial distribution of heat of VLSI chips put greater emphasis on chip-packag... [more] |
VLD2007-84 DC2007-39 pp.13-18 |
CAS, SIP, VLD |
2007-06-22 11:30 |
Hokkaido |
Hokkaido Tokai Univ. (Sapporo) |
Power Constrained IP Core Wrapper Design with Partitioned Clock Domains Thomas Edison Yu, Tomokazu Yoneda (NAIST), Danella Zhao (Unive. of Louisiana), Hideo Fujiwara (NAIST) CAS2007-25 VLD2007-41 SIP2007-55 |
Rapid developments in VLSI technology has made it possible to embed whole system components onto a single chip, called S... [more] |
CAS2007-25 VLD2007-41 SIP2007-55 pp.37-42 |
|
|
|
Copyright and reproduction :
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
|
[Return to Top Page]
[Return to IEICE Web Page]
|