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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2012-09-19 15:05 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Speedup of soft error tolerance evaluation with bootstrap method for FPGA systems Kohei Takano, Yoshihiro Ichinomiya, Motoki Amagasaki, Morihiro Kuga, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)  RECONF2012-45 |
SRAM-based field programmable gate arrays (FPGAs) are vulnerable to a single event upset (SEU). Although techniques for ... [more] | RECONF2012-45 pp.125-130 |
| RECONF | 2012-05-29 15:10 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Hard error avoidance for TMR module using dynamic relocation in an FPGA Hiroki Tanaka, Yoshihiro Ichinomiya, Sadaki Usagawa, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2012-11 |
FPGA can recover from hard-error by reconfiguring itself, avoiding the hard-error part.Especially, the fault recovery ca... [more] | RECONF2012-11 pp.61-66 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-03 13:30 |
Miyagi | A Case Study of Supervisor Processor for Dependable System Makoto Fujino, Yoshihiro Ichinomiya, Hiroki Tanaka, Sayaka Yoshiura, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2011-92 DC2011-96 |
Multicore processor is widely used in various systems. Although it will be used in harsh environment such as in-vehicle... [more] |
CPSY2011-92 DC2011-96 pp.199-204 |
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| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-28 16:05 |
Miyazaki | NewWelCity Miyazaki | Fast soft-error recovery method for duplicated softcore processor system Yoshihiro Ichinomiya, Makoto Fujino, Motoki Amagasaki, Morihiro Kuga, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2011-42 |
This paper presents a technique for ensuring the reliability of the softcore processor which implemented with SRAM-based... [more] | RECONF2011-42 pp.7-12 |
| RECONF | 2011-09-26 15:55 |
Aichi | Nagoya Univ. | Relocation of Partial Reconfiguration Data for Dynamic Reconfigurable System Sadaki Usagawa, Yoshihiro Ichinomiya, Motoki Amagasaki, Morihiro Kuga, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2011-30 |
[more] | RECONF2011-30 pp.49-54 |
| RECONF | 2011-05-12 13:30 |
Hokkaido | Hokkaido Univ. (Faculty of Eng., B3 Bldg.) | Context Synchronization Method for Reliable Softcore Processor System Makoto Fujino, Noritaka Kai, Yoshihiro Ichinomiya, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2011-5 |
SRAM-based FPGAs are vulnerable to a SEU, which is induced by radiation effect. The SEU's effects on configuration mem... [more] |
RECONF2011-5 pp.25-30 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 13:35 |
Fukuoka | Kyushu University | Examination of the virtual wiring for an ASIC emulator using high-speed serial communication Toshio Yabuta, Yoshihiro Ichinomiya, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2010-33 |
Examination of the virtual wiring for an ASIC emulator using high-speed serial communication [more] | CPSY2010-33 pp.7-12 |
| RECONF | 2010-09-17 09:25 |
Shizuoka | Shizuoka University (Faculty of Eng., Hall 2) | COGRE: A Novel Compact Logic Cell Architecture for Area Reduction Yasuhiro Okamoto, Yoshihiro Ichinomiya, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2010-31 |
In order to implement logic functions, conventional field programmable gate arrays (FPGAs) adopt look-up tables (LUTs) a... [more] | RECONF2010-31 pp.79-84 |
| RECONF | 2010-09-17 09:50 |
Shizuoka | Shizuoka University (Faculty of Eng., Hall 2) | An Error Detect and Correct Circuit Based Fault-tolerant Reconfigurable Logic Device Qian Zhao, Yoshihiro Ichinomiya, Yasuhiro Okamoto, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2010-32 |
As the size of integrated circuit has reached the nanoscale, embedded memories are more sensitive to single event upset ... [more] | RECONF2010-32 pp.85-90 |
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-27 14:30 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Fault Recovery Technique for Softcore Processor using Partial Reconfiguration Yoshihiro Ichinomiya, Shiro Tanoue, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) VLD2009-94 CPSY2009-76 RECONF2009-79 |
This paper presents a technique for ensuring reliable softcore processor implemented on SRAM-based Field Programmable Ga... [more] | VLD2009-94 CPSY2009-76 RECONF2009-79 pp.155-160 |
| RECONF | 2009-05-15 09:30 |
Fukui | Recovery and syncronization technique for TMR softcore processor Yoshihiro Ichinomiya, Shiro Tanoue, Toshio Yabuta, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2009-9 |
This paper presents a technique for ensuring reliable softcore processor implemented on SRAM-based Field Programmable Ga... [more] | RECONF2009-9 pp.49-54 |
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| RECONF | 2008-09-26 12:50 |
Okayama | Okayama Univ. | A Case Study of Reliable Softcore Processor Using TMR Technique Yoshihiro Ichinomiya, Shiro Tanoue, Tomoyuki Ishida, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2008-35 |
SRAM-based FPGA has lower reliability than dedicated integrated circuit because of radiation effect. We focus on TMR (Tr... [more] | RECONF2008-35 pp.75-80 |
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