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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 8 of 8  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
MW 2023-06-22
15:55
Kanagawa Yugawara-machi Shou-Kou-Kai Bldg.
(Primary: On-site, Secondary: Online)
[Special Talk] Design Amplifier with RF simulator
Tsutomu Sugawara (Cadence Design Systems, Japan) MW2023-24
(To be available after the conference date) [more] MW2023-24
pp.25-28
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2018-12-05
10:20
Hiroshima Satellite Campus Hiroshima Prototyping of Real-time Computer-Aided Diagnosis System for Colorectal Endoscopic Movies and Images with Machine Learning
Takumi Okamoto, Masayuki Odagawa, Koujiroh Takebayashi, Mikihisa Nagano, Tetsushi Koide, Toru Tamaki, Bisser Raytchev, Kazufumi Kaneda (Hiroshima Univ.), Shigeto Yoshida, Hiroshi Mieno (JR Hiroshima Hospital), Shinji Tanaka (Hiroshima Univ.), Takayuki Sugawara, Hiroshi Toishi, Masayuki Tsuji, Nobuo Tamba (Cadence, Japan) VLD2018-42 DC2018-28
In this paper, we discuss prototyping of real-time computer-aided diagnosis (CAD) system for colorectal endoscopic movie... [more] VLD2018-42 DC2018-28
pp.13-18
DC 2009-12-11
13:25
Shimane   Note on Programmable On-Product Clock Generation (OPCG) Circuitry for Low Power Aware Delay Test
Anis Uzzaman (Cadence Design Systems/Tokyo Metro. Univ), Brion Keller, Tom Snethen (Cadence), Kazuhiko Iwasaki, Masayuki Arai (Tokyo Metro. Univ) DC2009-57
This paper describes how we provide a mean for dealing with the programmable aspects of on-product clock generation (OPC... [more] DC2009-57
pp.7-12
RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC
(Joint) [detail]
2006-11-29
13:30
Fukuoka Kitakyushu International Conference Center [Special Talk] SystemVerilog Tutorial
Kasumi Hamaguchi (Panasonic), Takaaki Akashi (Synopsys), Takeharu Yui (ONW), Kenji Goto (Cadence), Miyuki Okamoto (SANYO), Masashi Sugiura (Zuken), Takehiko Tsuchiya (Toshiba), Yukio Chiwata (Fujitsu), Hirokuni Taketazu (Panasonic), KunDo Lee (Mentor), Yoshio Takamine (Renesas)
 [more] VLD2006-66 DC2006-53 RECONF2006-38
pp.1-13
ICD, SIP, IE, IPSJ-SLDM 2006-10-26
09:20
Miyagi   A multi DSP generation system with fractal structured architecture from C language
Masanori Nishizawa, Yuichi Shirai, Yoshizo Osumi, Hideto Nishikado (Ritsumeikan Univ.), Toshiyuki Katou (Cadence Design Systems Japan Corp.), Hironori Yamauchi (Ritsumeikan Univ.), Shiro Kobayashi (Asahi Kasei Corp.)
 [more] SIP2006-84 ICD2006-110 IE2006-62
pp.7-10
ICD, SIP, IE, IPSJ-SLDM 2006-10-26
09:40
Miyagi   A CDFG architecture suitable for DSP generation and
Yuichi Shirai, Masanori Nishizawa, Yoshizo Osumi, Hideto Nishikado (Ritsumeikan Univ.), Toshiyuki Katou (Cadence Design Systems Japan Corp.), Hironori Yamauchi (Ritsumeikan Univ.), Shiro Kobayashi (Asahi Kasei Corp.)
 [more] SIP2006-85 ICD2006-111 IE2006-63
pp.11-16
ICD, SIP, IE, IPSJ-SLDM 2006-10-26
10:00
Miyagi   Design of Embedded System for Micro-Capsule-Robot
Tsutomu Nishimura, Masatsugu Kobayashi, Takehiro Yoshida, Manabu Takeishi, Tomonori Izumi (Ritsumeikan Univ.), Toshiyuki Katou (Cadence Design Systems Japan Corp.), Hironori Yamauchi (Ritsumeikan Univ.)
 [more] SIP2006-86 ICD2006-112 IE2006-64
pp.17-22
VLD, ICD, DC, IPSJ-SLDM 2005-11-30
13:30
Fukuoka Kitakyushu International Conference Center [Fellow Memorial Lecture] Layout CAD and DFM -- Beginning and Maturity --
Takashi Mitsuhashi (Cadence Japan)
The auther had an opportunity to be engaged in development of VLSI layout design automation, and automation of design ve... [more] VLD2005-54 ICD2005-149 DC2005-31
pp.1-6
 Results 1 - 8 of 8  /   
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