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Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-30
10:30
Kanagawa Hiyoshi Campus, Keio University Error detection using residue signed-digit number arithmetic for arithmetic circuits
Yoshitomo Nema, Yuuki Tanaka, Kazuhiro Motegi, Shugang Wei (Gunma Univ) VLD2014-136 CPSY2014-145 RECONF2014-69
For error detection of multiply-accumulate operation, a residue error detector can be considered for the VLSI implementa... [more] VLD2014-136 CPSY2014-145 RECONF2014-69
pp.151-156
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