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Conference Papers (Available on Advance Programs) (Sort by: Date Descending)

Committee	Date Time	Place		Paper Title / Authors	Abstract	Paper #
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail]	2007-11-21 14:15	Fukuoka	Kitakyushu International Conference Center	A design method for easily testable multipliers adaptable to various structures of partial product addition Nobutaka Kito, Naofumi Takagi (Nagoya Univ.) VLD2007-83 DC2007-38	We propose a design method for easily testable multipliers. We construct partial product adders of a multiplier with t... [more]	VLD2007-83 DC2007-38 pp.7-12
ICD, VLD	2007-03-09 08:40	Okinawa	Mielparque Okinawa	Easily Testable Multiplier with 4-2 Adder Tree Nobutaka Kito, Kensuke Hanai, Naofumi Takagi (Nagoya Univ.)	The growth of the scale of VLSI designs makes test cost of VLSI chips expensive. Techniques of test cost reduction are r... [more]	VLD2006-140 ICD2006-231 pp.1-6

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