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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 5 of 5  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
CAS, NLP 2013-09-26
12:40
Gifu Satellite Campus, Gifu University Efficient Transient Analysis of 3-D Stacked On-Chip Power Distribution Network with Power/Ground Through Silicon Vias by Using Block Latency Insertion Method
Daisei Nagata, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2013-36 NLP2013-48
In this report, we apply the block latency insertion method (block-LIM) to the transient analysis of on-chip power distr... [more] CAS2013-36 NLP2013-48
pp.1-6
CAS, NLP 2011-10-20
14:20
Shizuoka Shizuoka Univ. Fast Simulation of Multiconductor System with Nonlinear Devices by Using Block-Latency Insertion Method and Reduced Order Model
Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2011-41 NLP2011-68
This paper describes a fast circuit simulation technique based on the block-latency insertion method (block-LIM) and a m... [more] CAS2011-41 NLP2011-68
pp.49-54
EMCJ, IEE-EMC 2011-06-24
14:00
Kyoto Kyoto Univ. Fast Simulation Technique Based on Block-Latency Insertion Method for Large Linear Circuit with CMOS Inverters
Yusuke Hizawa, Hiroki Kurobe, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) EMCJ2011-40
For an analysis of large networks including nonlinear active devices and coupled elements, conventional SPICE-like simul... [more] EMCJ2011-40
pp.37-42
EMCJ, ITE-BCT 2011-03-11
14:30
Tokyo Kikai-Shinko-Kaikan Bldg. Multirate Block-LIM for Fast Transient Analysis of Tightly Coupled Transmission Lines
Yuta Inoue, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) EMCJ2010-124
The block-Latency Insertion Method (block-LIM) is one of the techniques for fast transient analyses of large scale linea... [more] EMCJ2010-124
pp.33-38
MSS, CAS 2009-11-26
14:20
Aichi Nagoya University Parallel-Distributed Block Latency Insertion Method (Block-LIM) for Fast Transient Simulation of Tightly Coupled Transmission Lines
Yuta Inoue, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.) CAS2009-49 CST2009-22
Latency Insertion Method (LIM) is one of the techniques for fast transient analysis of linear circuit which is much fast... [more] CAS2009-49 CST2009-22
pp.25-30
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