IEICE Technical Report

Print edition: ISSN 0913-5685
Online edition: ISSN 2432-6380

vol. 105, no. 232

Silicon Device and Materials

Workshop Date : 2005-08-18 / Issue Date : 2005-08-11

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SDM2005-128
A 95mW MPEG2 MP@HL Motion Estimation Processor Core for Portable High Resolution Video Application
Yuichiro Murachi (Kobe Univ.), Koji Hamano, Tetsuro Matsuno (Kanazawa Univ.), Junichi Miyakoshi (Kobe Univ.), Masayuki Miyama (Kanazawa Univ.), Masahiko Yoshimoto (Kobe Univ.)
pp. 1 - 6

SDM2005-129
An Energy Reduction Method for FFT Circuits in Digital Wireless Communications Using Bitwidth Control
Masayuki Tokunaga, Kosuke Tarumi, Hiroto Yasuura (Kyushu Univ.)
pp. 7 - 12

SDM2005-130
TIS Locking Circuit for Compensating LSI Performance by Temperature Variation
Goichi Ono, Masayuki Miyazaki, Kazuki Watanabe, Takayuki Kawahara (Hitachi, Ltd.)
pp. 13 - 18

SDM2005-131
A Digital Detector Design For Measuring Gate-Delay Variation
Ryota Sakamoto, Masanori Muroyama, Kosuke Tarumi, Hiroto Yasuura (Kyushu Univ.)
pp. 19 - 24

SDM2005-132
[Special Invited Talk] *
Makoto Yoshimi (SOITEC Asia)
pp. 25 - 30

SDM2005-133
Experimental Study on the Mobility Superiority in (110)-oriented Ultra-thin Body pMOSFETs
Gen Tsutsui, Masumi Saitoh, Toshiro Hiramoto (Univ. of Tokyo)
pp. 31 - 36

SDM2005-134
Variable body-factor FD SOI MOSFET for VTCMOS applications
Tetsu Ohtou, Toshiharu Nagumo, , Toshiro Hiramoto (Univ. Tokyo)
pp. 37 - 42

SDM2005-135
Measurement and evaluation of delay variation due to inductive and capacitive coupling noise
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye (Osaka Univ.)
pp. 43 - 48

SDM2005-136
Isolation Strategy against Substrate Coupling in CMOS Mixed-Signal/RF Circuits
Daisuke Kosaka, Makoto Nagata (Kobe Univ.), Yoshitaka Murasaka, Atsushi Iwata (A-R-Tec Corp.)
pp. 49 - 54

SDM2005-137
A Test Structure to Analyze (Highly-Doped)/(Lightly-Doped)-Drain in LDD-type CMOSFET
Takashi Ohzone (Okayama Pref. Univ.), Toshihiro Matsuda (Toyama Pref. Univ.), Kazuhiko Okada, Takayuki Morishita, Kiyotaka Komoku (Okayama Pref. Univ.), Hideyuki Iwata (Toyama Pref. Univ.)
pp. 55 - 60

SDM2005-138
Delay Modeling and Static Timing Analysis for MTCMOS Circuits
Naoaki Ohkubo, Kimiyoshi Usami (Shibaura Institute of Tech.)
pp. 61 - 66

SDM2005-139
Monitoring Scheme for Minimizing Power Consumption by Means of Supply and Threshold Voltage Control in Active and Standby Modes
Yoshifumi Ikenaga, Masahiro Nomura, Koichi Takeda, Yoetsu Nakazawa (NEC), Yoshiharu Aimoto (NECEL), Yasuhiko Hagihara (NEC)
pp. 67 - 72

SDM2005-140
A Low Dynamic Power and Low Leakage Power CMOS Square-Root Circuit
Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.)
pp. 73 - 78

SDM2005-141
A Low Leakage SRAM Macro with Replica Cell Biasing Scheme
Osamu Hirabayashi, Yasuhisa Takeyama, Hiroyuki Otake, Keiichi Kushida, Nobuaki Otsuka (Toshiba Corp.)
pp. 79 - 84

SDM2005-142
SOI; the Trump Card of SOCs in Sub. 50-nm Era -- Techniques that SOI Conquers Bulk! --
Tadayoshi Enomoto (Chuo Univ.), Takakuni Douseki (NTT), Kazutami Arimoto (Renesas), Jiroh Ida (Oki), Takashi Ipposhi (Renesas), Kazuhiko Miki (Toshiba), Masanao Yamaoka (Hitachi), Makoto Yoshimi (SOITEC)
pp. 85 - 90


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan