IEICE Technical Report

Print edition: ISSN 0913-5685
Online edition: ISSN 2432-6380

vol. 105, no. 43

Reconfigurable Systems

Workshop Date : 2005-05-13 / Issue Date : 2005-05-06

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RECONF2005-15
Development of a testbed RCPII to evaluate effects of a real environment for a reconfigurable computing
Kosei Shimoo, Akira Yamawaki, Masahiko Iwane (KIT)
pp. 1 - 5

RECONF2005-16
An implementation of number-plate recognition algorithm on reconfigurable system
Takamasa Kanamori, Shizuto Fukuda (Keio Univ.), Yoshiaki Ajioka (Ecchandes), Masatoshi Arai (CalsonicKansei), Shinya Hashimoto (MEITEC), Hideharu Amano (Keio Univ.)
pp. 7 - 11

RECONF2005-17
Experiment on number recognition for parallel operation
Masatoshi Arai (CalsonicKansei), Shinya Hashimoto (MEITEC), Yoshiaki Ajioka (Ecchandes), Takamasa Kanamori, Shizuto Fukuda, Hideharu Amano (Keio Univ.)
pp. 13 - 17

RECONF2005-18
Reconfigurable 3D-FFT processor
Tohru Sasaki (APM), Umpei Nagashima (AIST)
pp. 19 - 23

RECONF2005-19
Data-Supplying Subsystem for the Parallel Reconfigurable Image Processing System
Akiyoshi Wakatani (Konan Univ.), Hiroshi Kadota (Kyushu Univ.)
pp. 25 - 30

RECONF2005-20
Developing a parallel reconfigurable system for physics computations
Tsuyoshi Hamada, Naohito Nakasato (RIKEN)
pp. 31 - 36

RECONF2005-21
[Invited Talk] Programmable Device Technologies for SoC Embedded Applications
Masami Nakajima, Hideyuki Noda, Kazutami Arimoto (Renesas)
pp. 37 - 42

RECONF2005-22
A performance evaluation of SIMD type accelerator for JPEG2000 application
Fumiaki Senoue, Kozo Komoda, Masahiro Iida, Morihiro Kuga (Kumamoto Univ.), Hideyuki Noda, Masami Nakajima (Renesas), Toshinori Sueyoshi (Kumamoto Univ.)
pp. 43 - 48

RECONF2005-23
A high-speed real number computation using simple SIMD operations
Hiroyuki Yamasaki, Masahiro Iida (Kumamoto Univ.), Katsuya Mizumoto, Osamu Yamamoto (Renesas), Toshinori Sueyoshi (Kumamoto Univ.)
pp. 49 - 54

RECONF2005-24
A Proposal of Template Reconfiguration Method
Masayasu Suzuki, Hideharu Amano (Keio Univ.)
pp. 55 - 60

RECONF2005-25
An Analysis of Fixed Point Arithmetic for DRP
Miwa Miyata, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.)
pp. 61 - 66

RECONF2005-26
Implementation of Active Direction-Pass Filter on Dynamically Reconfigurable Processor
Shunsuke Kurotaki, Noriaki Suzuki (Keio Univ.), Kazuhiro Nakadai (HRI), Hiroshi G. Okuno (Kyoto Univ.), Hideharu Amano (Keio Univ.)
pp. 67 - 72

RECONF2005-27
Implementation of Simplified Back Propagation Algorithm on a Dynamically Reconfigurable Device PCA-2
Tomoko Ootsuka, Keigo Kurata, Junji Kitamichi, Kenichi Kuroda (The Univ. of Aizu)
pp. 73 - 78

RECONF2005-28
Robot Vision System with Three Dimensionally Integrated Reconfigurable Image Processor
Takeaki Sugimura, Jun Deguchi, Yuta Konishi, Yoshihiro Nakatani, Takafumi Fukushima, Atsushi Konno, Hiroyuki Kurino, Masaru Uchiyama, Mitsumasa Koyanagi (Tohoku Univ.)
pp. 79 - 84

RECONF2005-29
Reconfigurable sensor network based on mutual communications with reliability index
Takeshi Fujiwara, Kensuke Komatsu, Hiroyuki Takahashi, Masaharu Nakazawa (Tokyo Univ.)
pp. 85 - 89


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan