Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
[TOP] | [2006] | [2007] | [2008] | [2009] | [2010] | [2011] | [2012] | [Japanese] / [English]
VLD2009-29
Fast Global Floorplanning Method Based on Stable-LSE
Yasuhiro Takashima, Masatomo Kuwano (Univ. of Kitakyushu)
pp. 1 - 6
VLD2009-30
A Detail Via Arrangement Method for Reduction of Wire Congestion in 2-Layer Ball Grid Array Packages
Masaki Kinoshita, Yoichi Tomioka (Tokyo Inst. of Tech.), Atsushi Takahashi (Osaka Univ.)
pp. 7 - 12
VLD2009-31
A Wall Generation for Trunk Routing of Multiple Nets on Single Layer
Yukihide Kohira (Univ. of Aizu.), Atsushi Takahashi (Osaka Univ.)
pp. 13 - 18
VLD2009-32
Complete ILP-Formulation of High-Level Synthesis
Keisuke Inoue, Mineo Kaneko (JAIST)
pp. 19 - 24
VLD2009-33
A System LSI Design and Verification Environment Using JACKAL Language
Takafumi Kohara (Kinki Univ.), Ryuichi Nakawaki (FUJITSU FSAS), Yasuhiro Nagata (NEC System Techno.), Takashi Kambe (Kinki Univ.)
pp. 25 - 30
VLD2009-34
On accelleration of SER analysis for sequential circuits using implicit enumeration
Yusuke Matsunaga, Yusuke Akamine (Kyushu Univ.)
pp. 31 - 36
VLD2009-35
[Invited Talk]
Trace-Driven Workload Simulation Method for Multiprocessor System-On-Chips
Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda (Tokyo Inst. of Tech.), Toshiro Isomura, Kazuo Satou (TOYOTA MOTOR CORP.)
p. 37
VLD2009-36
An Approach for Algorithm Tuning of Power Grid Simulation by GPGPU
Makoto Yokota, Yuuya Isoda, Hisako Sugano, Ittetsu Taniguchi, Masahiro Fukui (Ritsumeikan Univ.)
pp. 39 - 44
VLD2009-37
Triage Device Slightly Injured Person in Disaster Medical Assistant Network
Keishi Sakanushi, Akihito Hiromori (Osaka Univ/JST), Taichiro Imamura, Junya Okamoto (Osaka Univ), Takuji Hieda, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ/JST), Junji Kitamichi (Osaka Univ), Teruo Higashino (Osaka Univ/JST)
pp. 45 - 50
VLD2009-38
High Throughput Irregular LDPC Decoder Based on High-Efficiency Column Operation Unit for IEEE 802.11n Standard
Akiyuki Nagashima, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.)
pp. 51 - 56
VLD2009-39
DFG Mapping for Flexible Engine/Generic ALU Array and Its Dedicated Synthesis Algorithm
Ryo Tamura, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.), Makoto Satoh (Hitachi Ltd.)
pp. 57 - 62
VLD2009-40
A remote optically reconfigurable gate array using fibers
Yumiko Ueno, Minoru Watanabe (Shizuoka Univ.)
pp. 63 - 66
VLD2009-41
A configuration speed acceleration method using negative logic implementation
Retsu Moriwaki, Minoru Watanabe (Shizuoka Univ.)
pp. 67 - 70
VLD2009-42
Defect tolerance of a MEMS dynamic optically reconfigurable gate array
Daisaku Seto, Minoru Watanabe (Shizuoka Univ.)
pp. 71 - 76
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.