Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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SCE2009-17
A Logic Design Verification Method for SFQ Circuits Considering Pipeline Processing Behavior
Motoki Sato, Masamitsu Tanaka, Kazuyoshi Takagi, Naofumi Takagi (Nagoya Univ)
pp. 1 - 6
SCE2009-18
A clock line for a Large Scale Reconfigurable Data Paths Processor
Irina Kataeva, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ.v)
pp. 7 - 11
SCE2009-19
Design of SFQ Floating-Point Units Using Nb Advanced Process
Toshiki Kainuma, Yasuhiro Shimamura, Fumishige Miyaoka, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Nat. Univ.), Akira Fujimaki, Naofumi Takagi, Kazuyoshi Takagi (Nagoya Univ.)
pp. 13 - 18
SCE2009-20
Dynamically Reconfigurable Single Flux Quantum Logic Gates
Yuki Yamanashi, Ichiro Okawa, Nobuyuki Yoshikawa (Yokohama Nat. Univ.)
pp. 19 - 23
SCE2009-21
Access Time Measurement of 64 kb Josephson/CMOS Hybrid Memories using SFQ Time-to-Digital Converter
Yuji Okamoto, Heejoung Park, Hyunjoo Jin, Kenta Yaguchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.)
pp. 25 - 29
SCE2009-22
Analysis of gray zone in QOSs
Shigeyuki Miyajima, Yosuke Higashi, Isao Nakanishi, Akira Fujimaki (Nagoya Univ.)
pp. 31 - 35
SCE2009-23
Development of SFQ circuit for compact neutron detector
Isao Nakanishi, Shigeyuki Miyajima, Yosuke Higashi, Akira Fujimaki (Nagoya Univ.)
pp. 37 - 39
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.