Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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VLD2009-1
Task Migration for Energy Savings in Multiprocessor Real-Time Systems
Gang Zeng (Nagoya Univ.), Shinpei Kato (The Univ. of Tokyo), Tetsuo Yokoyama, Hiroyuki Tomiyama, Hiroaki Takada (Nagoya Univ.)
pp. 1 - 6
VLD2009-2
A Weighted-Sum Circuit Using Selector Logic By Transforming Bit-Level Operations
Tomoaki Hara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.), Motonobu Tonomura (Dai Nippon Printing Corp.)
pp. 7 - 12
VLD2009-3
A scan test generation method to reduce the number of detected untestable faults
Hiroshi Ogawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ.), Toshinori Hosokawa (Nihon Univ.), Koji Yamazaki (Meiji Univ.)
pp. 13 - 18
VLD2009-4
A RST Construction Method for Vertices with Maximum Path Length
Masafumi Inoue, Yoichi Tomioka (Tokyo Inst. of Tech.), Yukihide Kohira (the Univ. of Aizu), Atsushi Takahashi (Osaka Univ.)
pp. 31 - 36
VLD2009-5
Importance sampling with two-phase preprocess considering structural symmetry of SRAM circuits
Takanori Date, Shiho Hagiwara, Takumi Uezono (Tokyo Inst. of Tech.), Takashi Sato (Kyoto Univ.), Kazuya Masu (Tokyo Inst. of Tech.)
pp. 37 - 42
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.