IEICE Technical Report

Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380

Dependable Computing

Workshop Date : 2010-04-13 / Issue Date : 2010-04-06

DC2010-1
[Invited Talk] Increasing Dependability based on Asynchronous Computation
Tomohiro Yoneda (NII/Tokyo Tech.)
p. 1

DC2010-2
Dual Quorum System Adopting the Probabilistic Consistency
Satoshi Fukumoto, Kota Ishikawa, Masayuki Arai (Tokyo Metropolitan Univ.)
pp. 3 - 8

DC2010-3
Accurate Asynchronous Network-on-Chip Simulation Based on Reactive Delay Model
Tomoyoshi Funazaki, Naoya Onizawa, Atsushi Matsumoto, Takahiro Hanyu (RIEC, Tohoku Univ.)
pp. 9 - 14

DC2010-4
BILBO FF with soft error correcting capability
Kazuteru Namba, Hideo Ito (Chiba Univ.)
pp. 15 - 20

DC2010-5
Improvement of Transient-Fault-Tolerant Scheme for Out-of-Order Superscalar Processors
Satoshi Arima, Takashi Okada, Takanobu Kita, Ryota Shioya, Masahiro Goshima, Shuichi Sakai (The Univ. of Tokyo)
pp. 21 - 26

DC2010-6
Proposal of Thread Virtualization Environment on Cell Broadband Engine
Masahiro Yamada, Yuri Nishikawa (Keio Univ), Masato Yoshimi (Doshisha Univ), Hideharu Amano (Keio Univ)
pp. 27 - 32

DC2010-7
Fault-tolerant FPGA Architecture
Takashi Okada, Takanobu Kita, Ryota Shioya, Masahiro Goshima, Shuichi Sakai (Tokyo Univ.)
pp. 33 - 37

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan