IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 111, Number 31

Reconfigurable Systems

Workshop Date : 2011-05-12 - 2011-05-13 / Issue Date : 2011-05-05

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Table of contents

RECONF2011-1
Resource Sharing in FPGA and Implementation of Face-Angle Detection Algorithm using Impulse C
Takaaki Miyajima (Keio Univ.), Masatoshi Arai (Calsonic), Hideharu Amano (Keio Univ.)
pp. 1 - 6

RECONF2011-2
Pattern Compression of FAST Corner Detection and its FPGA Implementation
Keisuke Dohi, Yuji Yorita, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.)
pp. 7 - 12

RECONF2011-3
An Implementation of Mean Shift Filter on FPGA
Dang Ba Khac Trieu, Tsutomu Maruyama (University of Tsukuba)
pp. 13 - 18

RECONF2011-4
A real-time stereo vision system using a tree-structured dynamic programming on FPGA
Minxi Jin, Tsutomu Maruyama (Tsukuba Univ.)
pp. 19 - 24

RECONF2011-5
Context Synchronization Method for Reliable Softcore Processor System
Makoto Fujino, Noritaka Kai, Yoshihiro Ichinomiya, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 25 - 30

RECONF2011-6
Evaluation of reliability enhancement achieved by fault avoidance on dynamically reconfigurable architectures
Hiroaki Konoura (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. Tech.), Masanori Hashimoto, Takao Onoye (Osaka Univ.)
pp. 31 - 36

RECONF2011-7
Implementation of Bundled-Data Asynchronous Circuits on FPGA and thier Performance Evaluation
Tadashi Okabe (TIRI)
pp. 37 - 42

RECONF2011-8
Design and Implementation of a Portable Framework for PCI Express Interface
Shoichi Igarashi, Ryuhei Morita, Yuichi Okuyama (Univ. of Aizu), Tsuyoshi Hamada (Nagasaki Univ.), Junji Kitamichi, Kenichi Kuroda (Univ. of Aizu)
pp. 43 - 48

RECONF2011-9
Development of Wireless Video Transmission Equipment in 5GHz MIMO-OFDM Using FPGA
Jun Takizawa, Takaya Kaji, Shingo Yoshizawa (Hokkaido Univ.), Takashi Gunji, Morio Tawarayama (Mitubishi Denki Tokki System), Yoshikazu Miyanaga (Hokkaido Univ.)
pp. 49 - 54

RECONF2011-10
A Virus Scanning Engine Using a 4IGU Emulator and an MPU
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura (KIT)
pp. 55 - 60

RECONF2011-11
[Invited Talk] ERATO MINATO Discrete Structure Manipulation System Project and Current Work on System Design Area
Shin-ichi Minato (Hokkaido Univ.)
pp. 61 - 66

RECONF2011-12
*
Akira Fukui, Masahiro Fujita (Tokyo University)
pp. 67 - 72

RECONF2011-13
Implementation of Out-Of-Order Execution System for Acceleration of Surface Integral in FaSTAR
Takayuki Akamine, Kenta Inakagata (Keio Univ.), Yasunori Osana (Ryukyu Univ.), Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.)
pp. 73 - 78

RECONF2011-14
Evaluation of Scalable Streaming Array for High-Performance Stencil Computation with Low Memory Bandwidth
Kentaro Sano (Tohoku Univ.), Yoshiaki Hatsuda (Kobo Co. Ltd), Yoshiaki Kono, Satoru Yamamoto (Tohoku Univ.)
pp. 79 - 84

RECONF2011-15
Optimization of Application Programs of SLD-1 : A Low Power Accelarator
Nobuaki Ozaki, Yoshihiro Yasuda, Yoshiki Saito, Daisuke Ikebuchi, Masayuki Kimura, Hideharu Amano (Keio Univ.), Hiroshi Nakamura (Univ. of Tokyo), Kimiyoshi Usami (Shibaura Tech. Univ.), Mitaro Namiki (Tokyo Univ. of Agriculture and Tech.), Masaaki Kondo (Tokyo Univ. of Electro-Communication)
pp. 85 - 90

RECONF2011-16
Implementation and Evaluation of a low power accelerator SLD-2
Mai Izawa, Nobuaki Ozaki, Yoshihiro Yasuda, Masayuki Kimura, Hideharu Amano (Keio Univ.)
pp. 91 - 96

RECONF2011-17
Power Consumption Evaluation of a Dynamically Reconfigurable Multi-cryptoprocessor on Virtex-5 FPGA
Yohei Hori, Toshihiro Katashita, Akashi Satoh (AIST)
pp. 97 - 102

RECONF2011-18
A Implementation of Programmable Re-Ordering Unit for Array Processor
Tomoyoshi Kobori, Nozomi Ishihara, Katsutoshi Seki, Masao Ikekawa (NEC)
pp. 103 - 108

RECONF2011-19
A Homogeneous Routing Architecture for Efficient FPGA Design
Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 109 - 114

RECONF2011-20
A Novel Abridged Adaptive LUT Architecture with Few Configulation Memories
Ken Taura, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 115 - 120

RECONF2011-21
A 256-context optically reconfiguration using a digital mirror device
Yuichiro Yamaji, Minoru Watanabe (Shizuoka Univ.)
pp. 121 - 125

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan