IEICE Technical Report

Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380

Reconfigurable Systems

Workshop Date : 2012-11-27 - 2012-11-28 / Issue Date : 2012-11-20

RECONF2012-46
[Invited Talk] Application Examples of FPGA -- Parallel Computers and Network --
Yuetsu Kodama (Univ. of Tsukuba)
pp. 1 - 2

RECONF2012-47
Low Power Reconfiguarable Accelerator Design with Silicon on Thin Buried Oxide
Hongliang Su, Weihan Wang, Hideharu Amano (Keio Univ.)
pp. 3 - 8

RECONF2012-48
A study on reconfigurable direct conversion JAVA accelerator for embedded systems
Seiya Takada, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ)
pp. 9 - 14

RECONF2012-49
[Keynote Address] Dynamically Reconfigurable Processor (DRP) Technology: Current Status and Future Prospects
Masato Motomura (Hokkaido Univ.), Koichiro Furuta, Toru Awashima, Yasunari Shida (Renesas Electronics)
p. 15

RECONF2012-50
A Basic Study of FPGA Routing Architecture Based on Scale Free Network
Satoshi Hayama, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 17 - 22

RECONF2012-51
0.18um CMOS process dynamic optically reconfigurable gate array VLSI
Takayuki Kubota, Minoru Watanabe (Shizuoka Univ.)
pp. 23 - 27

RECONF2012-52
A 9-context optically reconfigurable gate array using a polymer-dispersed liquid crystal holographic memory
Retsu Moriwaki, Minoru Watanabe (Shizuoka Univ.), Akifumi Ogiwara (Kobe City College of Tech.)
pp. 29 - 32

RECONF2012-53
A Hardware Algorithm Using Dynamically Partially Reconfigurable FPGAs for Solving the Maximum Clique Problem of Large Graphs
Chikako Miura, Shinobu Nagayama, Shin'ichi Wakabayashi, Masato Inagi (Hiroshima City Univ.)
pp. 33 - 38

RECONF2012-54
A Winning Board Detector Using an Index Generation Unit
Kousiro Shiihara, Yuki Idokawa, Hiroki Nakahara (Kaoghima Univ.)
pp. 39 - 44

RECONF2012-55
An Implementation of a Tiny Spectrometer for a Radio Telescope on an Extensible Processing Platform
Hiroki Nakahara, Hiroyuki Nakanishi (Kagosima Univ.), Tsutomu Sasao (KIT)
pp. 45 - 50

RECONF2012-56
A Case Study of Short-term Development of Cooperation with FPGA-based System by Introducing Distributed-object ORB Engine
Takeshi Ohkawa, Soshi Takano, Daichi Uetake, Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba (Utsunomiya Univ.)
pp. 51 - 56

RECONF2012-57
Performance Evaluation of RC-OS for Multiple FPGA Clusters
Akira Kojima, Tetsuo Hironaka (Hiroshima City Univ.)
pp. 57 - 62

RECONF2012-58
The Attempt to Model-Based Hardware Development Using SysML
Ryota Yamazaki (Tokai Univ), Naohiko Shimizu (Tokai Univ/IP ARCH Inc.)
pp. 63 - 69

RECONF2012-59
An observational study on fault-avoidance methods using dynamic partial reconfiguration
Hiroaki Konoura (Osaka Univ.), Takashi Imagawa (Kyoto Univ.), Yukio Mitsuyama (Kochi Univ. of Tech.), Masanori Hashimoto, Takao Onoye (Osaka Univ.)
pp. 71 - 76

RECONF2012-60
Implementation of an Image Recognition System with Hierarchical Feature Learning Function
Baku Ogasawara, Satoru Yokota, Hakaru Tamukoh, Masatoshi Sekine (TUAT)
pp. 77 - 82

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan