Online edition: ISSN 2432-6380
[TOP] | [2016] | [2017] | [2018] | [2019] | [2020] | [2021] | [2022] | [Japanese] / [English]
RECONF2019-1
Efficient Instruction Fetch Architectures for a RISC-V Soft Processor
Hiromu Miyazaki, Junya Miura, Kenji Kise (Tokyo Tech)
pp. 1 - 6
RECONF2019-2
(See Japanese page.)
pp. 7 - 10
RECONF2019-3
(See Japanese page.)
pp. 11 - 16
RECONF2019-4
Study of new stacked type logic circuit scheme with fabrication technology of 3D flash memory.
Fumiya Suzuki, Shigeyoshi Watanabe (Shonan Inst. of Tech.)
pp. 17 - 21
RECONF2019-5
(See Japanese page.)
pp. 23 - 27
RECONF2019-6
High Level Synthesis of Recursive Description in a CPU+FPGA Co-design framework based on Ruby
Ryota Yamashita, Daichi Teruya, Hironori Nakajo (TUAT)
pp. 29 - 34
RECONF2019-7
Hideki Takase (Kyoto Univ./JST), Kentaro Matsui (Kyoto Univ.), Yoshihiro Ueno (Delight Systems), Masakazu Mori (karabiner.inc), Susumu Yamazaki (Univ. of Kitakyushu)
pp. 35 - 40
RECONF2019-8
A case study of an FPGA implementation for streaming data filtering
Hiroki Nakagawa, Yasutaka TsuTsumi, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 41 - 46
RECONF2019-9
[Invited Talk]
Engineers' and Scientists' Way of Life
Kazuyuki Shudo (Tokyo Tech)
p. 47
RECONF2019-10
An FPGA Implementation of the Semantic Segmentation Model with Multi-path Structure
Youki Sada, Masayuki Shimoda, Shimpei Sato, Hiroki Nakahara (titech)
pp. 49 - 54
RECONF2019-11
(See Japanese page.)
pp. 55 - 60
RECONF2019-12
Tsunami Simulation on FPGA by Exploiting Temporal Parallelism using OpenCL
Fumiya Kono (Kobe Univ.), Naohito Nakasato (UoA)
pp. 61 - 66
RECONF2019-13
A case study of system development based on software hardware co-design using an FPGA/CPU mixed SoC
-- Implementation of the Julia set explorer using Ultra96 --
Kenta Sato, Yukinori Sato (TUT)
pp. 67 - 72
RECONF2019-14
(See Japanese page.)
pp. 73 - 78
RECONF2019-15
Deep Learning Framework with Numerical Precision
Masato Kiyama, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.)
pp. 79 - 84
RECONF2019-16
Spatial-Separable Convolution: Low memory CNN for FPGA
Akira Jinguji, Masayuki Shimoda, Hiroki Nakahara (titech)
pp. 85 - 90
RECONF2019-17
(See Japanese page.)
pp. 91 - 96
RECONF2019-18
(See Japanese page.)
pp. 97 - 102
RECONF2019-19
A CNN-based Classifier for a Digital Spectrometer on a Radio Telescope
Hiroki Nakahara, Shimpei Sato (Titech)
pp. 103 - 108
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.