IEICE Technical Report

Volume 126, Number 140

Computer Systems

Workshop Date : 2026-08-06 - 2026-08-07 / Issue Date :

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Table of contents

CPSY2026-17
Design and Implementation of the Veryl Hardware Description Language
Naoya Hatta (PEZY)
pp. 1 - 6

CPSY2026-18
An IDL for Portable WebAssembly Execution in TEEs
Koichi Hashimoto, Shogo Takata (TUAT), Yutaka Ishikawa (ROIS-DS/Otsuma Women's Uni.), Hironori Nakajo (TUAT)
pp. 7 - 12

CPSY2026-19
Analysis of Programs Difficult to Vectorize in GCC for RISC-V
Norihide Fujikawa, Kanemitsu Ootsu, Takuma Kitamoto (Utsunomiya Univ.)
pp. 13 - 18

CPSY2026-20
A Generation Method of Status Signal Sequences with Complete Estimated Field Random Testability to Minimize the Sequence Length Using PBO
Junpei Ajima, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyoto Sangyo Univ)
pp. 19 - 24

CPSY2026-21
A Control Point Insertion Method to Increase Gate-Exhaustive Fault Coverage Using UNSAT Cores
Hiroto Kogo, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyoto Sangyo Univ)
pp. 25 - 30

CPSY2026-22
Partial-Scan Design Based on Balanced Sequential Structure with Instruction-Level Register-File Scan
Shunsuke Oka, Satoshi Ohtake (Oita Univ.)
pp. 31 - 36

CPSY2026-23
Performance Evaluateion in GPGPU Implementation of Bayesian Network Estimation Software
Sosuke Kamisako (Okayama Univ. of Science), Yoshiyuki Kido (Okayama Univ. of Science/Kansai Univ.), Chonho Lee (Okayama Univ. of Science), Yoshinori Tamada (Hirosaki Univ.), Yasushi Okuno (Kyoto Univ.)
pp. 37 - 42

CPSY2026-24
A Study on the Impact of the Instruction Fetch Mechanism in Embedded Processors on Power Consumption
Tenpei Oda, Masaya Ueda, Ryo Iwasaki, Masahiro Iida (Kumamoto Univ.)
pp. 43 - 48

CPSY2026-25
Implementation of a SIMT processor on FPGA -- Evaluation of implementation area and performance --
Shun Murakami, Keisuke Takano (JAIST), Yasushi Inoguchi (Kanazawa Univ.)
pp. 49 - 54

CPSY2026-26
Exploring CGRA-Based Acceleration of Graph-Based SLAM on Embedded SoCs
Mayuko Motonaga, Hisako Ito, Makoto Saito (UTokyo), Takuya Kojima (Univ. of Tsukuba/UTokyo), Hideki Takase, Hiroshi Nakamura (UTokyo)
pp. 55 - 60

CPSY2026-27
(See Japanese page.)
pp. 61 - 66

CPSY2026-28
Training-Free Efficient MaskGIT Inference via Active-Token Updates
Qiuhan Li, Yuki Ichikawa, Masato Motomura, Daichi Fujiki, Tatsuya Kaneko (Science Tokyo)
pp. 67 - 72

CPSY2026-29
On the FPGA Implementation of Event-Based Unsupervised Anomaly Detection
Yang Hui, Keisuke Sugiura, Takuya Kojima, Yoshiki Yamaguchi (Univ. Tsukuba)
pp. 73 - 78

CPSY2026-30
On the Line-Based Inference for Image Matting
Keisuke Sugiura, Takuya Kojima, Yoshiki Yamaguchi (Univ. Tsukuba), Hiroki Matsutani (Keio Univ.), Ryouhei Tsugami, Toshihito Fujiwara, Tatsuya Fukui, Satoshi Narikawa (NTT)
pp. 79 - 84

CPSY2026-31
Efficient Inference Methods for Inverted Transformers
Yuri Yamagami, Thiem Van Chu (Science Tokyo)
pp. 85 - 90

CPSY2026-32
A Flexible FPGA Implementation of a Min-Sum Relay-BP Decoder for qLDPC Codes
Kaijie Wei (Keio Univ.), Hideharu Amano (UTokyo)
pp. 91 - 96

CPSY2026-33
Quantization-Aware Fault-Injected Level Adjustment for Reliable Neural Network Deployment on Memristor Crossbars
Mizanur Rahman, Md. Sihabul Islam, Taisho Sasada, Michiko Inoue (NAIST)
pp. 97 - 102

CPSY2026-34
Educational Practices and Insights from Multi-University Operation of MCJ-CloudHub
Kazuichi Oe (NII), Tomoya Saito, Keigo Yabuki, Jun Nishii, Leelaluk Sukkit, Koichi Okada, Takahiro Tamesue, Yue Wang (Yamaguchi Univ.), Atsuko Takefusa (NII)
pp. 103 - 108

CPSY2026-35
TEA-Based Cache Utilization Policy for D2D Distributed Cooperative Cache
Yuta Abe, Celimuge WU, Tsutomu Yoshinaga (UEC)
pp. 109 - 114

CPSY2026-36
Toward Lightweight Visual SLAM for Autonomous Flight of Micro-Drones
Hiroto Sugai, Keisuke Sugiura, Takuya Kojima, Yoshiki Yamaguchi (Univ. Tsukuba), Ryouhei Tsugami, Toshihito Fujiwara, Tatsuya Fukui, Satoshi Narikawa (NTT)
pp. 115 - 120

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan