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| Presentation | 2005-07-27 11:35 Automatic logic synthesis scheme and tool implementation for Single-Flux-Quantum circuits Yoshio Kameda, Shinichi Yorozu, Yoshihito Hashimoto (SRL) Link to ES Tech. Rep. Archives:  SCE2005-17 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Single-flux-quantum (SFQ) logic circuits provide us a faster operation with low power consumption using Josephson junction as switching device. Logic synthesis is a process that generates a gate-level logic circuit from a functional specification written in hardware description languages. We present a logic synthesis method for SFQ circuits in this paper. We implemented an automatic synthesis tool. The experimental results showed the effectiveness of our syhtesis method and tool for large-scale SFQ logic circuits. For example, it took only two and half minutes to synthesize a 64-bit SFQ ALU with 16 functions. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | SFQ circuit / logic synthesis / pulse-driven logic / electronic design automation / hardware description language / single flux quantum / SFQ pulse / top-down design | |
| Reference Info. | IEICE Tech. Rep., vol. 105, no. 210, SCE2005-17, pp. 27-32, July 2005. | |
| Paper # | SCE2005-17 | |
| Date of Issue | 2005-07-20 (SCE) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: SCE2005-17 |
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| Conference Information | |
| Committee | SCE |
| Conference Date | 2005-07-27 - 2005-07-27 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hirosaki Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | materials, etc. |
| Paper Information | |
| Registration To | SCE |
| Conference Code | 2005-07-SCE |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Automatic logic synthesis scheme and tool implementation for Single-Flux-Quantum circuits |
| Sub Title (in English) | |
| Keyword(1) | SFQ circuit |
| Keyword(2) | logic synthesis |
| Keyword(3) | pulse-driven logic |
| Keyword(4) | electronic design automation |
| Keyword(5) | hardware description language |
| Keyword(6) | single flux quantum |
| Keyword(7) | SFQ pulse |
| Keyword(8) | top-down design |
| 1st Author's Name | Yoshio Kameda |
| 1st Author's Affiliation | Superconductivity Research Laboratory (SRL) |
| 2nd Author's Name | Shinichi Yorozu |
| 2nd Author's Affiliation | Superconductivity Research Laboratory (SRL) |
| 3rd Author's Name | Yoshihito Hashimoto |
| 3rd Author's Affiliation | Superconductivity Research Laboratory (SRL) |
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| Speaker | Author-1 |
| Date Time | 2005-07-27 11:35:00 |
| Presentation Time | 25 minutes |
| Registration for | SCE |
| Paper # | SCE2005-17 |
| Volume (vol) | vol.105 |
| Number (no) | no.210 |
| Page | pp.27-32 |
| #Pages | 6 |
| Date of Issue | 2005-07-20 (SCE) |
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