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| Paper Abstract and Keywords | ||
| Presentation | 2006-03-10 13:35 A Circuit Design of Reed-Solomon Decoder using Dynamically Reconfigurable Technology Teruhito Tanaka, Kouji Hatada, Tetsuya Konishi, Yoshikazu Odajima, Takashi Kambe (Kinki Univ.) Link to ES Tech. Rep. Archives:  ICD2005-245 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Reed-Solomon Decoder can correct continued errors and it has been a popular technology for various devices such as communication, hard disk, and DVD. This paper proposes acceleration and reduction of circuit scale of Reed-Solomon Decoder using "Dynamically Reconfigurable Processor " and evaluates its performance. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Reed-Solomon Decoder / Dynamically Reconfigurable Processor / DAPDNA-2 / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 105, no. 645, VLD2005-128, pp. 37-42, March 2006. | |
| Paper # | VLD2005-128 | |
| Date of Issue | 2006-03-03 (VLD, ICD) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: ICD2005-245 |
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| Conference Information | |
| Committee | ICD VLD |
| Conference Date | 2006-03-09 - 2006-03-10 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2006-03-ICD-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Circuit Design of Reed-Solomon Decoder using Dynamically Reconfigurable Technology |
| Sub Title (in English) | |
| Keyword(1) | Reed-Solomon Decoder |
| Keyword(2) | Dynamically Reconfigurable Processor |
| Keyword(3) | DAPDNA-2 |
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| 1st Author's Name | Teruhito Tanaka |
| 1st Author's Affiliation | Kinki University (Kinki Univ.) |
| 2nd Author's Name | Kouji Hatada |
| 2nd Author's Affiliation | Kinki University (Kinki Univ.) |
| 3rd Author's Name | Tetsuya Konishi |
| 3rd Author's Affiliation | Kinki University (Kinki Univ.) |
| 4th Author's Name | Yoshikazu Odajima |
| 4th Author's Affiliation | Kinki University (Kinki Univ.) |
| 5th Author's Name | Takashi Kambe |
| 5th Author's Affiliation | Kinki University (Kinki Univ.) |
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| Speaker | Author-1 |
| Date Time | 2006-03-10 13:35:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2005-128, ICD2005-245 |
| Volume (vol) | vol.105 |
| Number (no) | no.645(VLD), no.647(ICD) |
| Page | pp.37-42 |
| #Pages | 6 |
| Date of Issue | 2006-03-03 (VLD, ICD) |
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