Paper Abstract and Keywords |
Presentation |
2006-08-17 09:55
A supply voltage adjustment technique for low power consumption and its application to SOCs with multiple threshold voltage CMOS Hiroshi Okano, Tetsuyoshi Shiota, Yukihito Kawabe (Fujitsu lab.), Wataru Shibamoto (Fujitsu), Tetsutaro Hashimoto, Atsuki Inoue (Fujitsu lab.) Link to ES Tech. Rep. Archives: SDM2006-127 ICD2006-81 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
An energy-saving technique for SOCs using multiple threshold voltage CMOS was developed. It uses process sensors and process-voltage conversion tables generated from static timing analysis results to adjust the supply voltage according to process variation. A critical path replica circuit is conventionally used to determine a supply voltage. We enabled a supply voltage adjustment according to the process variation for SOCs using multiple threshold voltage CMOS by separating the path delay into a technology dependence part and a design dependence part. We applied this system to an embedded dual-core microprocessor using 90nm triple threshold voltage CMOS technology. When the microprocessor executes a video stream decoding program, 33% power reduction was measured with dies of fast process condition. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
low power / SOC / multiple threshold voltage CMOS / process variation / supply voltage adjustment / / / |
Reference Info. |
IEICE Tech. Rep., vol. 106, no. 207, ICD2006-81, pp. 13-18, Aug. 2006. |
Paper # |
ICD2006-81 |
Date of Issue |
2006-08-10 (SDM, ICD) |
ISSN |
Print edition: ISSN 0913-5685 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
Link to ES Tech. Rep. Archives: SDM2006-127 ICD2006-81 |
Conference Information |
Committee |
ICD SDM |
Conference Date |
2006-08-17 - 2006-08-18 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Hokkaido University |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
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Paper Information |
Registration To |
ICD |
Conference Code |
2006-08-ICD-SDM |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A supply voltage adjustment technique for low power consumption and its application to SOCs with multiple threshold voltage CMOS |
Sub Title (in English) |
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Keyword(1) |
low power |
Keyword(2) |
SOC |
Keyword(3) |
multiple threshold voltage CMOS |
Keyword(4) |
process variation |
Keyword(5) |
supply voltage adjustment |
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1st Author's Name |
Hiroshi Okano |
1st Author's Affiliation |
Fujitsu laboratories limited (Fujitsu lab.) |
2nd Author's Name |
Tetsuyoshi Shiota |
2nd Author's Affiliation |
Fujitsu laboratories limited (Fujitsu lab.) |
3rd Author's Name |
Yukihito Kawabe |
3rd Author's Affiliation |
Fujitsu laboratories limited (Fujitsu lab.) |
4th Author's Name |
Wataru Shibamoto |
4th Author's Affiliation |
Fujitsu limited (Fujitsu) |
5th Author's Name |
Tetsutaro Hashimoto |
5th Author's Affiliation |
Fujitsu laboratories limited (Fujitsu lab.) |
6th Author's Name |
Atsuki Inoue |
6th Author's Affiliation |
Fujitsu laboratories limited (Fujitsu lab.) |
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Speaker |
Author-1 |
Date Time |
2006-08-17 09:55:00 |
Presentation Time |
25 minutes |
Registration for |
ICD |
Paper # |
SDM2006-127, ICD2006-81 |
Volume (vol) |
vol.106 |
Number (no) |
no.206(SDM), no.207(ICD) |
Page |
pp.13-18 |
#Pages |
6 |
Date of Issue |
2006-08-10 (SDM, ICD) |
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