| Paper Abstract and Keywords |
| Presentation |
2007-01-19 10:35
A 3.5 GHz low distortion high powr FET using GaAs on-chip harmonic tuning circuit
Seiki Goto, Tetsuo Kunii, Akira Inoue (Mitsubishi Electric Corp.), Toshikazu Oue (WTI), Masaki Kohno, Tomoki Oku, Takahide Ishikawa (Mitsubishi Electric Corp.) |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
An ultra low distortion class-F power amplifier for 3.5GHz base stations of broadband access systems is presented. The feature of this amplifier is an GaAs on-chip input 2nd harmonic tuning circuit placed in front of each FET unit cell to achieve the linearity under class AB operating conditions by the accurate control of input 2nd harmonic impedance. With the proposed FET, a single-chip multi-cell FET for verification exhibits a low distortion of a -51 dBc ACPR and a 19% PAE with a 11.8-dB associated gain at a 10-dB back-off output power level under a 3.5-GHz 3GPP W-CDMA signal test. This ACPR corresponds to a 10-dB reduction in ACPR of a conventional FET. In addition, a 25 W power amplifier with two proposed FET chips successfully achieves a 1.5% EVM (Error Vector Magnitude) at an output power of 34.6 dBm under a 3.5-GHz WiMAX (IEEE 802.16a) compliant OFDM signal test, where the output power is a 10-dB back-off level. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
power amplifier / transistor / distortion / microwave communication / GaAs / WiMAX / / |
| Reference Info. |
IEICE Tech. Rep., vol. 106, no. 459, ED2006-228, pp. 155-160, Jan. 2007. |
| Paper # |
ED2006-228 |
| Date of Issue |
2007-01-10 (ED, MW) |
| ISSN |
Print edition: ISSN 0913-5685 |
| Download PDF |
|
| Conference Information |
| Committee |
MW ED |
| Conference Date |
2007-01-17 - 2007-01-19 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
|
| Paper Information |
| Registration To |
ED |
| Conference Code |
2007-01-MW-ED |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
A 3.5 GHz low distortion high powr FET using GaAs on-chip harmonic tuning circuit |
| Sub Title (in English) |
|
| Keyword(1) |
power amplifier |
| Keyword(2) |
transistor |
| Keyword(3) |
distortion |
| Keyword(4) |
microwave communication |
| Keyword(5) |
GaAs |
| Keyword(6) |
WiMAX |
| Keyword(7) |
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| Keyword(8) |
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| 1st Author's Name |
Seiki Goto |
| 1st Author's Affiliation |
Mitsubishi Electoric Corporation (Mitsubishi Electric Corp.) |
| 2nd Author's Name |
Tetsuo Kunii |
| 2nd Author's Affiliation |
Mitsubishi Electoric Corporation (Mitsubishi Electric Corp.) |
| 3rd Author's Name |
Akira Inoue |
| 3rd Author's Affiliation |
Mitsubishi Electoric Corporation (Mitsubishi Electric Corp.) |
| 4th Author's Name |
Toshikazu Oue |
| 4th Author's Affiliation |
Wave Technology Inc. (WTI) |
| 5th Author's Name |
Masaki Kohno |
| 5th Author's Affiliation |
Mitsubishi Electoric Corporation (Mitsubishi Electric Corp.) |
| 6th Author's Name |
Tomoki Oku |
| 6th Author's Affiliation |
Mitsubishi Electoric Corporation (Mitsubishi Electric Corp.) |
| 7th Author's Name |
Takahide Ishikawa |
| 7th Author's Affiliation |
Mitsubishi Electoric Corporation (Mitsubishi Electric Corp.) |
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| Speaker |
Author-1 |
| Date Time |
2007-01-19 10:35:00 |
| Presentation Time |
25 minutes |
| Registration for |
ED |
| Paper # |
ED2006-228, MW2006-181 |
| Volume (vol) |
vol.106 |
| Number (no) |
no.459(ED), no.460(MW) |
| Page |
pp.155-160 |
| #Pages |
6 |
| Date of Issue |
2007-01-10 (ED, MW) |