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Paper Abstract and Keywords
Presentation 2007-01-26 14:35
Basic Characteristics of A Novel Two-Phase Tapped Inductor Buck Converter
Daisuke Ishida, Kimihiro Nishijima (Oita Univ), Koosuke Harada (Sojo Univ), Tadao Nakano, Takashi Nabeshima, Terukazu Sato (Oita Univ) EE2006-55
Abstract (in Japanese) (See Japanese page) 
(in English) This paper presents detailed explanations of a novel two-phase coupled-inductor converter taking leakage inductances of the coupled-inductors into consideration. In this circuit, the energy stored into the leakage inductances is discharged through the body diodes of the FET switches, so that any snuber circuit is no longer necessary. Zero current switching can be realized. Prototype with a simple coupled-inductor construction is compared to the conventional two-phase buck converter.
Keyword (in Japanese) (See Japanese page) 
(in English) Multi-Phase / Buck-Converter / Tapped-Inductor / VRM / CPU / MPU / FPGA /  
Reference Info. IEICE Tech. Rep., vol. 106, no. 494, EE2006-55, pp. 107-114, Jan. 2007.
Paper # EE2006-55 
Date of Issue 2007-01-18 (EE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee EE  
Conference Date 2007-01-25 - 2007-01-26 
Place (in Japanese) (See Japanese page) 
Place (in English) Nagasaki prefectural art museum 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EE 
Conference Code 2007-01-EE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Basic Characteristics of A Novel Two-Phase Tapped Inductor Buck Converter 
Sub Title (in English)  
Keyword(1) Multi-Phase  
Keyword(2) Buck-Converter  
Keyword(3) Tapped-Inductor  
Keyword(4) VRM  
Keyword(5) CPU  
Keyword(6) MPU  
Keyword(7) FPGA  
1st Author's Name Daisuke Ishida  
1st Author's Affiliation Oita University (Oita Univ)
2nd Author's Name Kimihiro Nishijima  
2nd Author's Affiliation Oita University (Oita Univ)
3rd Author's Name Koosuke Harada  
3rd Author's Affiliation Sojo University (Sojo Univ)
4th Author's Name Tadao Nakano  
4th Author's Affiliation Oita University (Oita Univ)
5th Author's Name Takashi Nabeshima  
5th Author's Affiliation Oita University (Oita Univ)
6th Author's Name Terukazu Sato  
6th Author's Affiliation Oita University (Oita Univ)
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Speaker Author-1 
Date Time 2007-01-26 14:35:00 
Presentation Time 25 minutes 
Registration for EE 
Paper # EE2006-55 
Volume (vol) vol.106 
Number (no) no.494 
Page pp.107-114 
Date of Issue 2007-01-18 (EE) 

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