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| Presentation | 2007-03-08 11:10 A Clock Deskew Method Using Statisical Presumption Naoki Ootani, Yuko Hashizume, Yasuhiro Takashima (Univ. of Kitayushu), Yuichi Nakamura (NEC) Link to ES Tech. Rep. Archives:  ICD2006-217 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In deep-submicron technology, process variations can severely affect the performance and the yield of VLSI chips. As a countermeasure to the variations, deskew, which insert Programmable Delay Elements (PDEs) into the clock tree and adjust clock arrival times has been proposed. One of the previous deskew methods measures clock arrival times of all FFs and determines PDE delays by Linear Programming (LP). However, it is difficult to apply the method to practical problems, since the test cost to measure the clock arrival times of all FFs seems to be too high. In this paper, we propose a novel deskew method in which the arrival clock times of only small amount of FFs are measured and that of the rests are presumed under the assumption that process variation follows Gaussian distribution. Experiments show that our deskew method outputs the rate of the non-defective chips by measuring the arrival time of only 0.6% of FFs to improve as high as that by measuring the arrival time of all FFs. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Deskew / Programmable Delay Element (PDE) / Linear progamming / Gaussian distribution / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 106, no. 548, VLD2006-126, pp. 43-48, March 2007. | |
| Paper # | VLD2006-126 | |
| Date of Issue | 2007-03-01 (VLD, ICD) | |
| ISSN | Print edition: ISSN 0913-5685 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: ICD2006-217 |
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| Conference Information | |
| Committee | ICD VLD |
| Conference Date | 2007-03-07 - 2007-03-09 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Mielparque Okinawa |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | System-on-silicon design techniques and related VLSs |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2007-03-ICD-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Clock Deskew Method Using Statisical Presumption |
| Sub Title (in English) | |
| Keyword(1) | Deskew |
| Keyword(2) | Programmable Delay Element (PDE) |
| Keyword(3) | Linear progamming |
| Keyword(4) | Gaussian distribution |
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| 1st Author's Name | Naoki Ootani |
| 1st Author's Affiliation | The University of Kitakyushu (Univ. of Kitayushu) |
| 2nd Author's Name | Yuko Hashizume |
| 2nd Author's Affiliation | The University of Kitakyushu (Univ. of Kitayushu) |
| 3rd Author's Name | Yasuhiro Takashima |
| 3rd Author's Affiliation | The University of Kitakyushu (Univ. of Kitayushu) |
| 4th Author's Name | Yuichi Nakamura |
| 4th Author's Affiliation | NEC (NEC) |
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| Speaker | Author-1 |
| Date Time | 2007-03-08 11:10:00 |
| Presentation Time | 20 minutes |
| Registration for | VLD |
| Paper # | VLD2006-126, ICD2006-217 |
| Volume (vol) | vol.106 |
| Number (no) | no.548(VLD), no.551(ICD) |
| Page | pp.43-48 |
| #Pages | 6 |
| Date of Issue | 2007-03-01 (VLD, ICD) |
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