| Paper Abstract and Keywords |
| Presentation |
2007-03-08 13:50
BGA Routing by The Potential Router
Takayuki Hiromatsu, Masato Inagi, Yasuhiro Takashima, Yoji Kajitani (Univ. of Kitakyushu) |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
As the number of devices in an LSI chip becomes larger, the number of package pins also becomes larger. To fold the pins in the chip area, Ball Grid Array (BGA) packages are widely used. However, since the constrinats of the routing problem in BGA is too much and complicated, it is hard to design it manually. In this paper, we propose a novel routing algorithm for Pads on the In-most model (PoI) to minimize the total number of routes between adjacent pins, which has a strong relation with the minimum total wire length. We assume that i) the number of layers is one, ii) no assignment of nets to pads exists, and iii) the constraint of the number of nets between adjacent pins is given. For this problem, a novel representation of planar routing, called potential routing method, is used. On the potential routing, when a potential is assigned to each ball under the no-saddle constraint, the route of the ball is determined uniquely. Our algorithm is a heuristics based on the potential method. In addition, we compared the proposed method with SA-based algorithm also based on potential method. As a result, the proposed method output the less number of routes than that by SA-based algorithm. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Ball Grid Array (BGA) / Potential router / Monotonic routing / Design rules / No-saddle constraints / Single layer routing / Net assignment / |
| Reference Info. |
IEICE Tech. Rep., vol. 106, no. 548, VLD2006-131, pp. 73-78, March 2007. |
| Paper # |
VLD2006-131 |
| Date of Issue |
2007-03-01 (VLD, ICD) |
| ISSN |
Print edition: ISSN 0913-5685 |
| Download PDF |
|
| Conference Information |
| Committee |
ICD VLD |
| Conference Date |
2007-03-07 - 2007-03-09 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Mielparque Okinawa |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
System-on-silicon design techniques and related VLSs |
| Paper Information |
| Registration To |
VLD |
| Conference Code |
2007-03-ICD-VLD |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
BGA Routing by The Potential Router |
| Sub Title (in English) |
|
| Keyword(1) |
Ball Grid Array (BGA) |
| Keyword(2) |
Potential router |
| Keyword(3) |
Monotonic routing |
| Keyword(4) |
Design rules |
| Keyword(5) |
No-saddle constraints |
| Keyword(6) |
Single layer routing |
| Keyword(7) |
Net assignment |
| Keyword(8) |
|
| 1st Author's Name |
Takayuki Hiromatsu |
| 1st Author's Affiliation |
The University of Kitakyushu (Univ. of Kitakyushu) |
| 2nd Author's Name |
Masato Inagi |
| 2nd Author's Affiliation |
The University of Kitakyushu (Univ. of Kitakyushu) |
| 3rd Author's Name |
Yasuhiro Takashima |
| 3rd Author's Affiliation |
The University of Kitakyushu (Univ. of Kitakyushu) |
| 4th Author's Name |
Yoji Kajitani |
| 4th Author's Affiliation |
The University of Kitakyushu (Univ. of Kitakyushu) |
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| Speaker |
Author-1 |
| Date Time |
2007-03-08 13:50:00 |
| Presentation Time |
20 minutes |
| Registration for |
VLD |
| Paper # |
VLD2006-131, ICD2006-222 |
| Volume (vol) |
vol.106 |
| Number (no) |
no.548(VLD), no.551(ICD) |
| Page |
pp.73-78 |
| #Pages |
6 |
| Date of Issue |
2007-03-01 (VLD, ICD) |