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Paper Abstract and Keywords
Presentation 2007-06-22 10:50
Timing error risk analysis and power grid optimization considering variabilities of manufacturing
Makoto Terao, Kenji Kusano, Yoshiyuki Kawakami, Masahiro Fukui (Ritsumeikan Univ.), Shuji Tsukiyama (Chuo Univ.) CAS2007-23 VLD2007-39 SIP2007-53
Abstract (in Japanese) (See Japanese page) 
(in English) With the advent of super deep submicron age, the circuit behavior has large variation according to the process variation. Power grid optimization which considers the timing error risk caused by the variation becomes very important for the stable and fast operation of the system. Conventionally, a lot of power grid optimization algorithms has been proposed, and most of them use the IR drop as their object function. However, the IR drop is an indirect metric and we suspect if it were ambiguous metric for the real goral of the design. This paper proposes an approach which uses the “timing error risk caused by the IR drop” as its direct objective function. Experimental results shows the effectivity.
Keyword (in Japanese) (See Japanese page) 
(in English) delay analysis / dispersion / power and ground routing optimization / IR-drop / electro-migration / / /  
Reference Info. IEICE Tech. Rep., vol. 107, no. 103, VLD2007-39, pp. 25-30, June 2007.
Paper # VLD2007-39 
Date of Issue 2007-06-15 (CAS, VLD, SIP) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2007-23 VLD2007-39 SIP2007-53

Conference Information
Committee CAS SIP VLD  
Conference Date 2007-06-21 - 2007-06-22 
Place (in Japanese) (See Japanese page) 
Place (in English) Hokkaido Tokai Univ. （Sapporo) 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To VLD 
Conference Code 2007-06-CAS-SIP-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Timing error risk analysis and power grid optimization considering variabilities of manufacturing 
Sub Title (in English)  
Keyword(1) delay analysis  
Keyword(2) dispersion  
Keyword(3) power and ground routing optimization  
Keyword(4) IR-drop  
Keyword(5) electro-migration  
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1st Author's Name Makoto Terao  
1st Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
2nd Author's Name Kenji Kusano  
2nd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
3rd Author's Name Yoshiyuki Kawakami  
3rd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
4th Author's Name Masahiro Fukui  
4th Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
5th Author's Name Shuji Tsukiyama  
5th Author's Affiliation Chuo University (Chuo Univ.)
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Speaker Author-1 
Date Time 2007-06-22 10:50:00 
Presentation Time 20 minutes 
Registration for VLD 
Paper # CAS2007-23, VLD2007-39, SIP2007-53 
Volume (vol) vol.107 
Number (no) no.101(CAS), no.103(VLD), no.105(SIP) 
Page pp.25-30 
#Pages 6 
Date of Issue 2007-06-15 (CAS, VLD, SIP) 

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