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| Presentation | 2007-08-23 09:20 Evaluation of Heterogeneous Multicore Architecture with AAC-LC Stereo Encoding Hiroaki Shikano (Hitachi/./Waseda Univ.), Masaki Ito, Takashi Todaka, Takanobu Tsunoda, Tomoyuki Kodama, Masafumi Onouchi, Kunio Uchiyama (Hitachi), Toshihiko Odaka (Hitachi/./Waseda Univ.), Tatsuya Kamei, Ei Nagahama, Manabu Kusaoke, Yusuke Nitta (Renesas Technology), Yasutaka Wada, Keiji Kimura, Hironori Kasahara (Waseda Univ.)  SDM2007-143 ICD2007-71 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper describes a heterogeneous multi-core processor (HMCP) architecture which integrates general purpose processors (CPU) and accelerators (ACC) to achieve high-performance as well as low-power consumption for SoCs of embedded systems. Memory architecture of CPUs and ACCs were unified to improve programming and compiling efficiency. For preliminary evaluation of the HMCP architecture, AAC-LC stereo audio encoding is parallelized on a heterogeneous multi-core having homogeneous processor cores and dynamic reconfigurable processor (DRP) accelerator cores. The performance evaluation shows that 54x AAC encoding is achieved on the chip with two CPUs at 600 MHz and two DRPs at 300 MHz, which realizes encoding of a whole CD in 1-2 minutes. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Heterogeneous multi-core / parallel processing / accelerator / dynamic reconfigurable processor / AAC encoding / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 107, no. 195, ICD2007-71, pp. 11-16, Aug. 2007. | |
| Paper # | ICD2007-71 | |
| Date of Issue | 2007-08-16 (SDM, ICD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | SDM2007-143 ICD2007-71 |
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| Conference Information | |
| Committee | ICD SDM |
| Conference Date | 2007-08-23 - 2007-08-24 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kitami Institute of Technology |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | VLSI Circuit and Device Technologies (High Speed, Low Voltage, and Low Power Consumption) |
| Paper Information | |
| Registration To | ICD |
| Conference Code | 2007-08-ICD-SDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Evaluation of Heterogeneous Multicore Architecture with AAC-LC Stereo Encoding |
| Sub Title (in English) | |
| Keyword(1) | Heterogeneous multi-core |
| Keyword(2) | parallel processing |
| Keyword(3) | accelerator |
| Keyword(4) | dynamic reconfigurable processor |
| Keyword(5) | AAC encoding |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Hiroaki Shikano |
| 1st Author's Affiliation | Hitachi, Ltd./Waseda Univ. (Hitachi/./Waseda Univ.) |
| 2nd Author's Name | Masaki Ito |
| 2nd Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 3rd Author's Name | Takashi Todaka |
| 3rd Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 4th Author's Name | Takanobu Tsunoda |
| 4th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 5th Author's Name | Tomoyuki Kodama |
| 5th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 6th Author's Name | Masafumi Onouchi |
| 6th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 7th Author's Name | Kunio Uchiyama |
| 7th Author's Affiliation | Hitachi, Ltd. (Hitachi) |
| 8th Author's Name | Toshihiko Odaka |
| 8th Author's Affiliation | Hitachi, Ltd./Waseda Univ. (Hitachi/./Waseda Univ.) |
| 9th Author's Name | Tatsuya Kamei |
| 9th Author's Affiliation | Renesas Technology Corporation (Renesas Technology) |
| 10th Author's Name | Ei Nagahama |
| 10th Author's Affiliation | Renesas Technology Corporation (Renesas Technology) |
| 11th Author's Name | Manabu Kusaoke |
| 11th Author's Affiliation | Renesas Technology Corporation (Renesas Technology) |
| 12th Author's Name | Yusuke Nitta |
| 12th Author's Affiliation | Renesas Technology Corporation (Renesas Technology) |
| 13th Author's Name | Yasutaka Wada |
| 13th Author's Affiliation | Waseda University (Waseda Univ.) |
| 14th Author's Name | Keiji Kimura |
| 14th Author's Affiliation | Waseda University (Waseda Univ.) |
| 15th Author's Name | Hironori Kasahara |
| 15th Author's Affiliation | Waseda University (Waseda Univ.) |
| Speaker | Author-1 |
| Date Time | 2007-08-23 09:20:00 |
| Presentation Time | 25 minutes |
| Registration for | ICD |
| Paper # | SDM2007-143, ICD2007-71 |
| Volume (vol) | vol.107 |
| Number (no) | no.194(SDM), no.195(ICD) |
| Page | pp.11-16 |
| #Pages | 6 |
| Date of Issue | 2007-08-16 (SDM, ICD) |
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