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Paper Abstract and Keywords
Presentation 2008-03-27 15:30
A VLSI Architecture of Parallel Hough Transform with Localized Voting Space Access
Masayuki Goto, Kazuhiro Nakamura, Yoshikazu Asada, Kazuyoshi Takagi, Naofumi Takagi (Nagoya Univ.) DC2007-97 CPSY2007-93
Abstract (in Japanese) (See Japanese page) 
(in English) Hough transform is a computer vision algorithm, which detects lines and circles in a binary image.
We propose a VLSI architecture for Hough transform.
The architecture is memory efficient and suitable for embedded systems that require
real-time performance and low-power.
The architecture implements parallel Hough computation with localized voting space access.
The voting process is besed on proposing patch-based image access order.
This image access order enables the voting space access to be localized.
This causes the number of indexes of voting memory in the circuit to be independent of image size.
The necessary voting memory in the circuit can be
reduced by about 97% on QVGA, and about 99% on SVGA compared with the circuit architecture in which localization is not considered.
Keyword (in Japanese) (See Japanese page) 
(in English) Hough transform / ASIC / image processing / memory access localization / parallel Hough transform circuit / / /  
Reference Info. IEICE Tech. Rep., vol. 107, no. 559, DC2007-97, pp. 79-84, March 2008.
Paper # DC2007-97 
Date of Issue 2008-03-20 (DC, CPSY) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee DC CPSY IPSJ-SLDM IPSJ-EMB  
Conference Date 2008-03-27 - 2008-03-28 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To DC 
Conference Code 2008-03-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A VLSI Architecture of Parallel Hough Transform with Localized Voting Space Access 
Sub Title (in English)  
Keyword(1) Hough transform  
Keyword(2) ASIC  
Keyword(3) image processing  
Keyword(4) memory access localization  
Keyword(5) parallel Hough transform circuit  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Masayuki Goto  
1st Author's Affiliation Nagoya University (Nagoya Univ.)
2nd Author's Name Kazuhiro Nakamura  
2nd Author's Affiliation Nagoya University (Nagoya Univ.)
3rd Author's Name Yoshikazu Asada  
3rd Author's Affiliation Nagoya University (Nagoya Univ.)
4th Author's Name Kazuyoshi Takagi  
4th Author's Affiliation Nagoya University (Nagoya Univ.)
5th Author's Name Naofumi Takagi  
5th Author's Affiliation Nagoya University (Nagoya Univ.)
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Speaker Author-1 
Date Time 2008-03-27 15:30:00 
Presentation Time 20 minutes 
Registration for DC 
Paper # DC2007-97, CPSY2007-93 
Volume (vol) vol.107 
Number (no) no.559(DC), no.558(CPSY) 
Page pp.79-84 
#Pages 6 
Date of Issue 2008-03-20 (DC, CPSY) 

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