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| Presentation | 2008-04-23 16:45 An approach to tolerating delay faults based on asynchronous circuits Tomohiro Yoneda (NII), Masashi Imai (Univ. of Tokyo), Atsushi Matsumoto, Takahiro Hanyu (Tohoku Univ.), Yuichi Nakamura (NEC)  CPSY2008-10 DC2008-10 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Recent advances in semiconductor process technologies cause new types of faults, which should be handled in order to obtain large and dependable VLSI systems. This report focuses on a type of faults that are caused by the stress during the operation and degrade performance of the circuit components. We analyze the influence of those delay faults in a data-flow level of hardware accelerators showing that asynchronous circuits are more robust than synchronous circuits with respect to such delay faults, and propose an approach to tolerating them using asynchronous circuit technologies and operational unit reallocation. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Delay faults / Asynchronous circuits / Operational unit reallocation / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 108, no. 15, DC2008-10, pp. 55-60, April 2008. | |
| Paper # | DC2008-10 | |
| Date of Issue | 2008-04-16 (CPSY, DC) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPSY2008-10 DC2008-10 |
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| Conference Information | |
| Committee | DC CPSY |
| Conference Date | 2008-04-23 - 2008-04-23 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Tokyo Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Dependable Computing Systems, etc. |
| Paper Information | |
| Registration To | DC |
| Conference Code | 2008-04-DC-CPSY |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An approach to tolerating delay faults based on asynchronous circuits |
| Sub Title (in English) | |
| Keyword(1) | Delay faults |
| Keyword(2) | Asynchronous circuits |
| Keyword(3) | Operational unit reallocation |
| Keyword(4) | |
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| 1st Author's Name | Tomohiro Yoneda |
| 1st Author's Affiliation | National Institute of Informatics (NII) |
| 2nd Author's Name | Masashi Imai |
| 2nd Author's Affiliation | University of Tokyo (Univ. of Tokyo) |
| 3rd Author's Name | Atsushi Matsumoto |
| 3rd Author's Affiliation | Tohoku Universiry (Tohoku Univ.) |
| 4th Author's Name | Takahiro Hanyu |
| 4th Author's Affiliation | Tohoku Universiry (Tohoku Univ.) |
| 5th Author's Name | Yuichi Nakamura |
| 5th Author's Affiliation | NEC (NEC) |
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| Speaker | Author-1 |
| Date Time | 2008-04-23 16:45:00 |
| Presentation Time | 30 minutes |
| Registration for | DC |
| Paper # | CPSY2008-10, DC2008-10 |
| Volume (vol) | vol.108 |
| Number (no) | no.14(CPSY), no.15(DC) |
| Page | pp.55-60 |
| #Pages | 6 |
| Date of Issue | 2008-04-16 (CPSY, DC) |
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