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Paper Abstract and Keywords
Presentation 2008-04-23 11:00
A Lightweight Write Error Detection for Register-file Using Improved Passive WAB
Hidetsugu Irie, Ken Sugimoto, Ryota Shioya (U-Tokyo), Kenichi Watanabe (Hitachi), Masahiro Goshima, Shuichi Sakai (U-Tokyo) CPSY2008-3 DC2008-3
Abstract (in Japanese) (See Japanese page) 
(in English) Recently, it has been getting inefficient to design microprocessors with worst-case margins because of increasing process and temperature variability.
Thus, microarchitectural techniques which dynamically detect and recover from timing-errors have come to be researched.
Previously, we have focused on timing-errors in register-file writing, and have proposed the technique named active WAB and passive WAB.
In this paper, we will reduce the overhead of passive WAB.
Focusing on physical registers which are never read, we propose ``pop on release'' and ``pop on flush'', and introduce them into passive WAB.
Simulation result showed that the number of stall cycles and additional register reads are significantly reduced this modification.
Keyword (in Japanese) (See Japanese page) 
(in English) microprocessor / delay variation / redundant execution / / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 14, CPSY2008-3, pp. 13-18, April 2008.
Paper # CPSY2008-3 
Date of Issue 2008-04-16 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2008-3 DC2008-3

Conference Information
Committee DC CPSY  
Conference Date 2008-04-23 - 2008-04-23 
Place (in Japanese) (See Japanese page) 
Place (in English) Tokyo Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Dependable Computing Systems, etc. 
Paper Information
Registration To CPSY 
Conference Code 2008-04-DC-CPSY 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Lightweight Write Error Detection for Register-file Using Improved Passive WAB 
Sub Title (in English)  
Keyword(1) microprocessor  
Keyword(2) delay variation  
Keyword(3) redundant execution  
Keyword(4)  
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1st Author's Name Hidetsugu Irie  
1st Author's Affiliation The University of Tokyo (U-Tokyo)
2nd Author's Name Ken Sugimoto  
2nd Author's Affiliation The University of Tokyo (U-Tokyo)
3rd Author's Name Ryota Shioya  
3rd Author's Affiliation The University of Tokyo (U-Tokyo)
4th Author's Name Kenichi Watanabe  
4th Author's Affiliation Hitachi,Ltd. (Hitachi)
5th Author's Name Masahiro Goshima  
5th Author's Affiliation The University of Tokyo (U-Tokyo)
6th Author's Name Shuichi Sakai  
6th Author's Affiliation The University of Tokyo (U-Tokyo)
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Speaker Author-1 
Date Time 2008-04-23 11:00:00 
Presentation Time 30 minutes 
Registration for CPSY 
Paper # CPSY2008-3, DC2008-3 
Volume (vol) vol.108 
Number (no) no.14(CPSY), no.15(DC) 
Page pp.13-18 
#Pages 6 
Date of Issue 2008-04-16 (CPSY, DC) 

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