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Paper Abstract and Keywords
Presentation 2008-06-20 14:50
[Invited Talk] The State of the Art and Future Trends of Test Design
Yasuo Sato (Hitachi) DC2008-15
Abstract (in Japanese) (See Japanese page) 
(in English) As the manufacturing process evolves with shrinking geometry and the speed of an LSI circuit increases, LSI testing technologies are required various changes qualitatively and quantitatively. The conventional tests, such as the stuck-at fault test, which finds LSI’s pass/fail deterministically, are no more major solutions, and the various parametric tests, which find LSI’s pass/fail statistically, became crucial. These statistical approaches are essentially different from the conventional ones. It also became crucial how to reduce test cost as long as suppressing the increase of the number of test patterns or the amount of test data. In this paper, we show the state of the art and future trends of DFT design based on the latest researches and ITRS (International Technology Roadmap for Semiconductors).
Keyword (in Japanese) (See Japanese page) 
(in English) test pattern count / test data amount / parametric test / test cost / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 99, DC2008-15, pp. 23-28, June 2008.
Paper # DC2008-15 
Date of Issue 2008-06-13 (DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF DC2008-15

Conference Information
Committee DC  
Conference Date 2008-06-20 - 2008-06-20 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design, Test, Verification 
Paper Information
Registration To DC 
Conference Code 2008-06-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) The State of the Art and Future Trends of Test Design 
Sub Title (in English)  
Keyword(1) test pattern count  
Keyword(2) test data amount  
Keyword(3) parametric test  
Keyword(4) test cost  
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1st Author's Name Yasuo Sato  
1st Author's Affiliation Hitachi Ltd. (Hitachi)
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Speaker Author-1 
Date Time 2008-06-20 14:50:00 
Presentation Time 50 minutes 
Registration for DC 
Paper # DC2008-15 
Volume (vol) vol.108 
Number (no) no.99 
Page pp.23-28 
#Pages 6 
Date of Issue 2008-06-13 (DC) 

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